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SSM3582BCPZ Datasheet(PDF) 45 Page - Analog Devices |
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SSM3582BCPZ Datasheet(HTML) 45 Page - Analog Devices |
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45 / 59 page ![]() Data Sheet SSM3582 Rev. 0| Page 45 of 59 Address: 0x0A, Reset: 0x07, Name: SAI_CTRL2 SDATA edge delay mode 1: Half cycle delay of SDATA. 0: Normal operation. Autom atic TDM slot selection 1: ADDRx pin settings. Set TDM slots autom atically using 0: Bits. Set TDM slots using TDM_SLOTx Channel volume link 1: Link both channels to VOL_L control. 0: controls. Use independent VOL_L and VOL_R Audio input data width 1: 16 bits. 0: 24 bits. High frequency clipper link 1: Bits. Link Both Channels to DAC_CLIP_L 0: Bits. Use Independent Left and Right DAC_CLIP_x Volume control zero-crossing detection 1: is detected (may be different per-channel) Only change volum e when zero-crossing 0: Allow volume to change at all tim es. 0 1 1 1 2 1 3 0 4 0 5 0 6 0 7 0 [7] SDATA_EDGE (R/W) [0] AUTO_SLOT (R/W) [6:5] RESERVED [1] VOL_LINK (R/W) [4] DATA_WIDTH (R/W) [2] CLIP_LINK (R/W) [3] VOL_ZC_ONLY (R/W) Table 34. Bit Descriptions for SAI_CTRL2 Bits Bit Name Settings Description Reset Access 7 SDATA_EDGE SDATA Edge Delay Mode 0x0 R/W 0 Normal Operation 1 Half Cycle Delay of SDATA [6:5] RESERVED Reserved 0x0 R 4 DATA_WIDTH Audio Input Data Width 0x0 R/W 0 24 Bits 1 16 Bits 3 VOL_ZC_ONLY Volume Control Zero-Crossing Detection 0x0 R/W 0 Allow Volume to Change at All Times 1 Only Change Volume When Zero-Crossing is Detected (May Be Different Per Channel) 2 CLIP_LINK High Frequency Clipper Link 0x1 R/W 0 Use Independent Left and Right DAC_CLIP_x Bits 1 Link Both Channels to DAC_CLIP_L Bits 1 VOL_LINK Channel Volume Link 0x1 R/W 0 Use Independent VOL_L and VOL_R Controls 1 Link Both Channels to VOL_L Control 0 AUTO_SLOT Automatic TDM Slot Selection 0x1 R/W 0 Set TDM Slots Using TDM_SLOT_x Bits 1 Set TDM Slots Automatically Using the ADDRx Pin Settings |
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