SSM3582BCPZ datasheet(46/59 Pages) AD

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SSM3582

Data Sheet

Rev. 0| Page 46 of 59

Address: 0x0B, Reset: 0x00, Name: SLOT_LEFT_CTRL

Left channel s lot s election

[7:5] RESERVED

[4:0] TDM_SLOT_L (R/W)

Table 35. Bit Descriptions for SLOT_LEFT_CTRL

Bits

Bit Name

Settings

Description

Reset

Access

[7:5]

RESERVED

Reserved

0x0

[4:0]

TDM_SLOT_L

Left Channel Slot Selection

0x0

R/W

Address: 0x0C, Reset: 0x01, Name: SLOT_RIGHT_CTRL

Right channel s lot s election

[7:5] RESERVED

[4:0] TDM_SLOT_R (R/W)

Table 36. Bit Descriptions for SLOT_RIGHT_CTRL

Bits

Bit Name

Settings

Description

Reset

Access

[7:5]

RESERVED

Reserved

0x0

[4:0]

TDM_SLOT_R

Right Channel Slot Selection

0x1

R/W

Address: 0x0E, Reset: 0xA0, Name: LIM_LEFT_CTRL1

Left lim iter releas e rate

11: 800 m s/dB.

10: 1200 m s/dB.

1: 1600 m s/dB.

0: 3200 m s/dB.

Left lim iter m ode

11: Lim iter on only if VBAT<VBAT_INF_L.

10: Mute output if VBAT<VBAT_INF_L.

1: Lim iter on.

0: Lim iter off.

Left lim iter attack rate

11: 20 us /dB.

10: 30 us /dB.

1: 60 us /dB.

0: 120 us/dB.

Left thres hold battery tracking

bits in Register 0x0F.

VBAT<VBAT_INF_L using SLOPE_x

Ram p Down Lim iter Thres hold when

Bits in Register0x0F.

Fixed Lim iter Threshold Set by LIM_THRES_L

[7:6] LIM_RRT_L (R/W)

[1:0] LIM_EN_L (R/W)

[5:4] LIM_ATR_L (R/W)

[2] VBAT_TRACK_L (R/W)

[3] RESERVED

Table 37. Bit Descriptions for LIM_LEFT_CTRL1

Bits

Bit Name

Settings

Description

Reset

Access

[7:6]

LIM_RRT_L

Left Limiter Release Rate

0x2

R/W

3200 ms/dB

1600 ms/dB

1200 ms/dB

800 ms/dB

[5:4]

LIM_ATR_L

Left Limiter Attack Rate

0x2

R/W

120 μs/dB

60 μs/dB

30 μs/dB

20 μs/dB

RESERVED

Reserved

0x0

SSM3582BCPZ Datasheet(PDF) 46 Page - Analog Devices

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