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THS10082IDA Datasheet(PDF) 32 Page - Texas Instruments |
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THS10082IDA Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 34 page ![]() THS10082 SLAS254B – MAY 2002 – REVISED NOVEMBER 2002 www.ti.com 32 10-Bit ADC VREFP VREFM AINP Σ VADC AINM + – Figure 41. Differential Input Stage In comparison to the single-ended configuration it can be seen that the voltage (VADC) which is applied at the input of the ADC is the difference between the input AINP and AINM. This means that VREFM defines the minimum voltage (AINM) which can be applied to the ADC. VREFP defines the maximum voltage (AINP) which can be applied to the ADC. The voltage VADC can be calculated as follows: V ADC + ABS(AINP–AINM) An advantage to single-ended operation is that the common-mode voltage V CM + AINM ) AINP 2 can be rejected in the differential configuration, if the following condition for the analog input voltages is true: AGND v AINM, AINP v AV DD 1V v V CM v 4V In addition to the common-mode voltage rejection, the differential operation allows a dc-offset rejection which is common to both analog inputs. See Figure 43. SINGLE-ENDED MODE OF OPERATION The THS10082 can be configured for single-ended operation using dc or ac coupling. In either case, the input of the THS10082 must be driven from an operational amplifier that does not degrade the ADC performance. Because the THS10082 operates from a 5-V single supply, it is necessary to level-shift ground-based bipolar signals to comply with its input requirements. This can be achieved with dc and ac coupling. An application example is shown for dc-coupled level shifting in the following section, dc coupling. (2) (3) (4) (5) |
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