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LPC844 Datasheet(PDF) 53 Page - NXP Semiconductors |
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LPC844 Datasheet(HTML) 53 Page - NXP Semiconductors |
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53 / 97 page ![]() LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 1.7 — 27 February 2018 53 of 97 NXP Semiconductors LPC84x 32-bit Arm Cortex-M0+ microcontroller USART3 - 58 142 - USART4 - 56 137 - Comparator ACMP - 79 144 - ADC - 78 190 Digital controller only. Analog portion of the ADC disabled in the PDRUNCFG register. - 78 190 Combined analog and digital logic. ADC enabled in the PDRUNCFG register and LPWRMODE bit set to 1 in the ADC CTRL register (ADC in low-power mode). - 79 190 Combined analog and digital logic. ADC enabled in the PDRUNCFG register and LPWRMODE bit set to 0 in the ADC CTRL register (ADC powered). DAC 0 - 46 107 - DAC 1 - 36 88 - Capacitive Touch - 49 117 - DMA - 355 858 - CRC - 36 83 - Table 14. Power consumption for individual analog and digital blocks …continued Peripheral Typical supply current in μA Notes System clock frequency = n/a 12 MHz 30 MHz |
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