LPC844 datasheet(79/97 Pages) NXP

79 / 97 page

LPC84x

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Product data sheet

Rev. 1.7 — 27 February 2018

79 of 97

NXP Semiconductors

LPC84x

32-bit Arm Cortex-M0+ microcontroller

(1) See Section 14.2 “XTAL oscillator” for the values of C1 and C2.

(2) Position the decoupling capacitors of 0.1 μF and 0.01 μF as close as possible to the VDD pin. Add one set of decoupling

capacitors to each VDD pin.

(3) Position the decoupling capacitors of 0.1 μF as close as possible to the VREFN and VDD pins. The 10 μF bypass capacitor

filters the power line. Tie VREFP to VDD if the ADC is not used. Tie VREFN to VSS if ADC is not used.

(4) Uses the Arm 10-pin interface for SWD.

(5) When measuring signals of low frequency, use a low-pass filter to remove noise and to improve ADC performance. Also see

Ref. 4.

(6) External pull-up resistors on SWDIO and SWCLK pins are optional because these pins have an internal pull-up enabled by

default.

Fig 39. Power, clock, and debug connections

PIO0_12

ADC_0

PIO0_8/XTALIN

PIO0_9/XTALOUT

VDD

VREFP

PIO0_6/ADC_1/ACMPVREF

VREFN

LPC84x

3.3 V

DGND

Note 5

Note 5 (ADC_1),

Note 3 (ACMPVREF)

Note 1

DGND

Note 2

Note 3

0.01 μF

0.1 μF

3.3 V

AGND

10 μF

0.1 μF

ISP select pin

aaa-026592

SWDIO/PIO0_2

SWCLK/PIO0_3

RESETN/PIO0_5

VSS

3.3 V

DGND

n.c.

SWD connector

(6)

(4)

(6)

3.3 V

~10 kΩ - 100 kΩ

3.3 V

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