ICS8305 Data Sheet

LOW SKEW, 1-TO-4 MULTIPLEXED DIFFERENTIAL/LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER

ICS8305AG REVISION C MAY 30, 2014

3

©2014 Integrated Device Technology, Inc.

Function Tables

Table 3. Control Input Function Table

After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as shown in Figure 1.

Figure 1. CLK_EN Timing Diagram

Inputs

Outputs

OE

CLK_EN

CLK_SEL

Selected Source

Q0:Q3

1

0

0

LVCMOS_CLK

Disabled; Low

1

0

1

CLK/nCLK

Disabled; Low

1

1

0

LVCMOS_CLK

Enabled

1

1

1

CLK/nCLK

Enabled

0

X

X

Hi-Z

Enabled

Disabled

CLK,

LVCMOS_CLK

CLK_EN

nCLK

Q0:Q3