ICS8305 Data Sheet

LOW SKEW, 1-TO-4 MULTIPLEXED DIFFERENTIAL/LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER

ICS8305AG REVISION C MAY 30, 2014

13

©2014 Integrated Device Technology, Inc.

Schematic Example

This application note provides general design guide using ICS8305

LVCMOS buffer. Figure 4 shows a schematic example of the

ICS8305 LVCMOS clock buffer. In this example, the input is driven by

an LVCMOS driver. CLK_EN is set at logic low to select

LVCMOS_CLK input.

Figure 4. ICS8305 LVCMOS Clock Output Buffer Schematic Example

LVCMOS Receiv er

R1

43

VDD

R5

1K

LVCMOS Receiv er

VDD=3.3V

VDD

R4

1K

Zo = 50

(U1,11)

Ro ~ 7 Ohm

3,.3V LVCMOS

(U1,15)

(U1,3)

VDD

R3

43

R2

43

C2

0.1u

U1

ICS8305

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

GND

OE

VDD

CLK_EN

CLK

nCLK

CLK_SEL

LVCMOS_CLK

GND

Q3

VDDO

Q2

GND

Q1

VDDO

Q0

Zo = 50

VDD

Zo = 50

C1

0.1u

R6

1K

C3

0.1u