MMPF0200 datasheet(28/114 Pages) NXP

28 / 114 page

NXP Semiconductors

PF0200

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.4.1.5

Coin cell mode

In the Coin Cell state, the coin cell is the only valid power source (VIN = 0.0 V) to the PMIC. No turn-on event is accepted in the Coin Cell

state. Transition to the OFF state requires that VIN surpasses UVDET threshold. RESETBMCU is held low in this mode.

If the coin cell is depleted, a complete system reset will occur. At the next application of power and the detection of a Turn-on event, the

system will be re-initialized with all I2C bits including those that reset on COINPORB, are restored to their default states.

6.4.2

State machine flow summary

Table 24 provides a summary matrix of the PF0200 flow diagram to show the conditions needed to transition from one state to another.

Table 23. Regulator mode control

SWxOMODE

Off operational mode (sleep) (36)

0Off

1PFM

Notes

36.

For sleep mode, an activated switching regulator, should use the off

mode set point as programmed by SW1ABOFF[5:0] for SW1A/B and

SWxOFF[6:0] for SW2 and SW3A/B.

Table 24. State machine flow summary

STATE

Next state

OFF

Coin cell

Sleep

Standby

OFF

XVIN < UVDET

PWRON_CFG = 0

PWRON = 1 & VIN > UVDET

PWRON_CFG = 1

PWRON = 0 < 4.0 s

& VIN > UNDET

Coin cell

VIN > UVDET

Sleep

Thermal Shutdown

VIN < UVDET

PWRON_CFG = 0

PWRON = 1 & VIN > UVDET

PWRON_CFG = 1

PWRON = 0 < 4.0 s &

VIN > UNDET

PWRON_CFG = 1

PWRON = 0 ≥ 4.0 s

Any SWxOMODE = 1 &

PWRONRSTEN = 1

Standby

Thermal Shutdown

VIN < UVDET

PWRON_CFG = 0

PWRON = 0

Any SWxOMODE = 1

PWRON_CFG = 1

PWRON = 0 ≥ 4.0 s

Any SWxOMODE = 1 &

PWRONRSTEN = 1

Standby de-asserted

PWRON_CFG = 0

PWRON = 0

All SWxOMODE = 0

PWRON_CFG = 1

PWRON = 0 ≥ 4.0 s

All SWxOMODE = 0 &

PWRONRSTEN = 1

Thermal Shutdown

VIN < UVDET

PWRON_CFG = 0

PWRON = 0

Any SWxOMODE = 1

PWRON_CFG = 1

PWRON = 0 ≥ 4.0 s

Any SWxOMODE = 1 &

PWRONRSTEN = 1

Standby asserted

PWRON_CFG = 0

PWRON = 0

All SWxOMODE = 0

PWRON_CFG = 1

PWRON = 0 ≥ 4.0 s

All SWxOMODE = 0 &

PWRONRSTEN = 1

MMPF0200 Datasheet(PDF) 28 Page - NXP Semiconductors

MMPF0200 Datasheet(HTML) 28 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL