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PCT2202 Datasheet(PDF) 20 Page - NXP Semiconductors |
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PCT2202 Datasheet(HTML) 20 Page - NXP Semiconductors |
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20 / 30 page ![]() PCT2202 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1.1 — 14 August 2015 20 of 30 NXP Semiconductors PCT2202 Ultra low power, 1.8 V, 1 deg. C accuracy, I2C-bus digital temp sensor (1) The value of A0 and A1 bits are determined by the A0 pin. (2) Master should leave SDA HIGH to terminate a single-byte read operation. (3) Master should leave SDA HIGH to terminate a two-byte read operation. Fig 16. I2C-bus timing diagram for ‘read word’ format 1 9 1 9 SCL SDA 10 0 1 0 A1(1) A0(1) R/W ACK by PCT2202 P1 P0 ACK by PCT2202 00 00 00 START by master Frame 1 I2C-bus slave address byte Frame 2 Pointer register byte 1 9 1 9 SCL (cont.) SDA (cont.) ACK by PCT2202 D7 D6 D5 D4 D3 ACK by master(2) D2 D1 D0 Frame 3 I2C-bus slave address byte Frame 4 Data byte 1 read register 002aah467 1 9 SCL (cont.) SDA (cont.) D7 D6 D5 D4 D3 ACK by master(3) D2 D1 D0 STOP by master Frame 5 Data byte 2 read register 10 0 1 0 A1(1) A0(1) R/W START by master from PCT2202 STOP by master from PCT2202 (1) The value of A0 and A1 bits are determined by the A0 pin. Fig 17. Timing diagram for SMBus ALERT 1 9 1 9 SCL SDA 00 0 1 1 002aah468 R/W ACK by PCT2202 status NACK by master 10 01 START by master Frame 1 SMBus ALERT Response Address byte Frame 2 slave address from PCT2202 ALERT 00 STOP by master from PCT2202 A1 A0 (1) (1) |
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