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ICS844011 Datasheet(PDF) 7 Page - Integrated Device Technology |
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ICS844011 Datasheet(HTML) 7 Page - Integrated Device Technology |
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7 / 14 page ![]() ICS844011AG REVISION A AUGUST 27, 2012 7 ©2012 Integrated Device Technology, Inc. ICS844011 Data Sheet FEMTOCLOCK® CRYSTAL-TO-LVDS CLOCK GENERATOR Parameter Measurement Information 3.3V LVDS Output Load Test Circuit Output Duty Cycle/Pulse Width/Period Differential Output Voltage Setup Output Rise/Fall Time 2.5V LVDS Output Load Test Circuit RMS Phase Jitter Offset Voltage Setup SCOPE Qx nQx 3.3V±5% POWER SUPPLY +– Float GND VDD VDDA t PW t PERIOD t PW t PERIOD odc = x 100% nQ Q 100 out out DC Input VOD/ ∆ V OD VDD 20% 80% 80% 20% tR t F VOD nQ Q SCOPE Qx nQx 2.5V±5% POWER SUPPLY +– Float GND VDD VDDA Offset Frequency f1 f2 Phase Noise Plot Area Under Curve Defined by the Offset Frequency Markers RMS Phase Jitter = 2 * * ƒ 1 * out out LVDS DC Input VOS/ ∆ V OS VDD |
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