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S71GL032A Datasheet(PDF) 24 Page - SPANSION |
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S71GL032A Datasheet(HTML) 24 Page - SPANSION |
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24 / 102 page ![]() 24 S71GL032A Based MCPs S71GL032A_00_A0 March 31, 2005 Advance Info rmation the system. Refer to the “DC Characteristics” section on page 65 for the automatic sleep mode current specification. RESET#: Hardware Reset Pin The RESET# pin provides a hardware method of resetting the device to reading array data. When the RESET# pin is driven low for at least a period of tRP, the device immediately terminates any operation in progress, tristates all output pins, and ignores all read/write commands for the duration of the RESET# pulse. The device also resets the internal state machine to reading array data. The op- eration that was interrupted should be reinitiated once the device is ready to accept another command sequence, to ensure data integrity. Current is reduced for the duration of the RESET# pulse. When RESET# is held at VSS±0.3 V, the device draws CMOS standby current (ICC5). If RESET# is held at VIL but not within VSS±0.3 V, the standby current will be greater. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firm- ware from the Flash memory. Refer to the AC Characteristics tables for RESET# parameters and to Figure 15 for the timing diagram. Output Disable Mode When the OE# input is at VIH, output from the device is disabled. The output pins are placed in the high impedance state. Table 2. S29GL032M (Models R1, R2) Sector Addresses A20-A15 Sector Size (KB/ Kwords) 16-bit Address Range A20-A15 Sector Size (KB/ Kwords) 16-bit Address Range SA0 000000 64/32 000000–007FFF SA32 10000 0 64/32 100000–107FFF SA1 000001 64/32 008000–00FFFF SA33 10000 1 64/32 108000–10FFFF SA2 000010 64/32 010000–017FFF SA34 10001 0 64/32 110000–117FFF SA3 000011 64/32 018000–01FFFF SA35 10001 1 64/32 118000–11FFFF SA4 000100 64/32 020000–027FFF SA36 10010 0 64/32 120000–127FFF SA5 000101 64/32 028000–02FFFF SA37 10010 1 64/32 128000–12FFFF SA6 000110 64/32 030000–037FFF SA38 10011 0 64/32 130000–137FFF SA7 000111 64/32 038000–03FFFF SA39 10011 1 64/32 138000–13FFFF SA8 001000 64/32 040000–047FFF SA40 10100 0 64/32 140000–147FFF SA9 001001 64/32 048000–04FFFF SA41 10100 1 64/32 148000–14FFFF SA10 001010 64/32 050000–057FFF SA42 10101 0 64/32 150000–157FFF SA11 001011 64/32 058000–05FFFF SA43 10101 1 64/32 158000–15FFFF SA12 001100 64/32 060000–067FFF SA44 10110 0 64/32 160000–167FFF SA13 001101 64/32 068000–06FFFF SA45 10110 1 64/32 168000–16FFFF SA14 001110 64/32 070000–077FFF SA46 10111 0 64/32 170000–177FFF SA15 001111 64/32 078000–07FFFF SA47 10111 1 64/32 178000–17FFFF SA16 010000 64/32 080000–087FFF SA48 11000 0 64/32 180000–187FFF SA17 010001 64/32 088000–08FFFF SA49 11000 1 64/32 188000–18FFFF SA18 010010 64/32 090000–097FFF SA50 11001 0 64/32 190000–197FFF SA19 010011 64/32 098000–09FFFF SA51 11001 1 64/32 198000–19FFFF SA20 010100 64/32 0A0000–0A7FFF SA52 11010 0 64/32 1A0000–1A7FFF SA21 010101 64/32 0A8000–0AFFFF SA53 11010 1 64/32 1A8000–1AFFFF SA22 010110 64/32 0B0000–0B7FFF SA54 11011 0 64/32 1B0000–1B7FFF SA23 010111 64/32 0B8000–0BFFFF SA55 11011 1 64/32 1B8000–1BFFFF SA24 011000 64/32 0C0000–0C7FFF SA56 11100 0 64/32 1C0000–1C7FFF SA25 011001 64/32 0C8000–0CFFFF SA57 11100 1 64/32 1C8000–1CFFFF SA26 011010 64/32 0D0000–0D7FFF SA58 11101 0 64/32 1D0000–1D7FFF SA27 011011 64/32 0D8000–0DFFFF SA59 11101 1 64/32 1D8000–1DFFFF SA28 011100 64/32 0E0000–0E7FFF SA60 11110 0 64/32 1E0000–1E7FFF SA29 011101 64/32 0E8000–0EFFFF SA61 11110 1 64/32 1E8000–1EFFFF SA30 011110 64/32 0F0000–0F7FFF SA62 11111 0 64/32 1F0000–1F7FFF SA31 011111 64/32 0F8000–0FFFFF SA63 11111 1 64/32 1F8000–1FFFFF |
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