AD9152-EBZ datasheet(60/103 Pages) AD

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AD9152

Data Sheet

Rev. B | Page 60 of 103

Table 63. PDP Registers

Addr.

Bit

No.

Value

Description

0x060

[7:0]

PDP_THRESHOLD[7:0]

Power that triggers

PDP_PROTECT. 8 LSBs.

0x061

[4:0]

PDP_THRESHOLD[12:8]

5 MSBs.

0x062

PDP_ENABLE

Set to 1 to enable PDP.

[3:0]

PDP_AVG_TIME

Can be set from 0 to 10.

Averages across

2(9 + PDP_AVG_TIME), IQ sample

pairs.

0x063

[7:0]

PDP_POWER[7:0]

If PDP_THRESHOLD is

crossed, this reads back

the maximum power

seen. If not, this reads

back the instantaneous

power. 8 LSBs.

0x064

[4:0]

PDP_POWER[12:8]

5 MSBs.

0x12C

PROTECT_MODE

If this bit is high, the DAC

is in protect mode, and is

shut down automatically

when some errors occur.

DACOFF_AVG_PW

If this bit is high, Bit 7 is

high, and the input

average power is greater

than the given threshold

(see Register 0x060 and

given time window, the

DAC output shuts down

automatically.

0x013

PDP_PROTECT_OUT

1: PDP_PROTECT triggers

PROTECT_OUT.

Power Detection and Protection IRQ

The PDP_PROTECT signal is available as an IRQ event.

Use Register 0x021, Bit 7 to enable PDP_PROTECT and then use

See the Interrupt Request Operation section for more information.

Transmit Enable State Machine

The TXENSM block controls the delay between TXEN and

the Tx_PROTECT signals. At the same time, the Tx_PROTECT

signal can optionally be routed externally to the PROTECT_

OUT pin and the TXENSM can generate the TX_DAC_CLK

signal and TX_DAC_CORE signal to power down the DAC

clock and DAC core.

If DACA_MASK (Register 0x012, Bit 6) = 1, a falling edge of

TXEN causes the DAC core I DAC and Q DAC to power down;

a rising edge of TXEN causes the DAC core I DAC and Q DAC

to power up.

If CLKA_MASK (Register 0x012, Bit 4 ) = 1, a falling edge of

TXEN causes the DAC clock to power down; a rising edge of

TXEN causes the DAC clock to power up.

The TXENSM is configured as shown in Table 64.

Table 64. TXENSM Registers

Addr.

Bit No.

Value

Description

0x012

DACA_MASK

DAC core power-down

mask for TXEN.

CLKA_MASK

Datapath power-down

mask for TXEN.

0x013

TX_PROTECT_OUT

1: TX_PROTECT triggers

PROTECT_OUT.

0x11F

TXEN_SM_EN

If high, enable TXEN

state machine.

TXENSM Startup Sequence

To ensure that the TXENSM functions properly, the following se-

quence must be used. Excepting Register 0x012 and Register 0x013,

other registers must follow the recommend values in Table 65.

Table 65. TXENSM Startup Sequence1

Addr.

Value

Description

0x012

0x00

Enable the DAC core and datapath power-down

mask

0x013

0x20

TX_PROTECT triggers PROTECT_OUT

0x140

0x04

Gain ramp up step

0x142

0x09

Gain ramp down step

0x11F

0x83

Enable the TXEN state machine

1 Perform these writes in the order they are listed in this table.

After applying the sequence in Table 65, the function of the

TXENSM timing is shown in Figure 67.

AD9152-EBZ Datasheet(PDF) 60 Page - Analog Devices

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