Data Sheet

AD5675

Rev. C | Page 23 of 27

LDAC MASK REGISTER

Command 0101 is reserved for this hardware LDAC function.

The address bits are ignored. Writing to the DAC using

Command 0101 loads the 8-bit LDAC register (DB7 to DB0).

The default for each channel is 0, that is, the LDAC pin works

normally. Setting the bits to 1 forces this DAC channel to ignore

transitions on the LDAC pin, regardless of the state of the

hardware LDAC pin. This flexibility is useful in applications

where the user wants to select which channels respond to

the LDAC pin.

The LDAC register gives the user extra flexibility and control

over the hardware LDAC pin (see Table 15). Setting the LDAC bits

(DB0 to DB7) to 0 for a DAC channel means that the update for

this channel is controlled by the hardware LDAC pin.

Table 14. LDAC Overwrite Definition

Load LDAC Register

LDAC Bits (DB7 to DB0)

LDAC Pin

LDAC Operation

00000000

1 or 0

Determined by the LDAC pin.

11111111

DAC channels update and override the LDAC pin. DAC channels see LDAC as 1.

1

X means don’t care.

Command

Description

Hardware LDAC Pin State

Input Register Contents

DAC Register Contents

0001

Write to Input Register n

(dependent on LDAC)

Data update

No change (no update)

GND2

Data update

Data update

0010

Update DAC Register n

with the contents of

Input Register n

No change

Updated with input register contents

GND

No change

Updated with input register contents

0011

Write to and update DAC

Channel n

Data update

Data update

GND

Data update

Data update

1

A high to low hardware LDAC pin transition always updates the contents of the DAC register with the contents of the input register on channels that are not masked

(blocked) by the LDAC mask register.

2

When LDAC is permanently tied low, the LDAC mask bits are ignored.