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LTC3418 Datasheet(PDF) 11 Page - Linear Technology |
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LTC3418 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 20 page ![]() 11 LTC3418 3418f Burst Clamp Programming If the voltage on the SYNC/MODE pin is less than VIN by 1V, Burst Mode operation is enabled. During Burst Mode operation, the voltage on the SYNC/MODE pin determines the burst clamp level, which sets the minimum peak inductor current, IBURST, for each switching cycle. A graph showing the relationship between the minimum peak inductor current and the voltage on the SYNC/MODE pin can be found in the Typical Performance Characteristics section. In the graph, VBURST is the voltage on the SYNC/ MODE pin. IBURST can only be programmed in the range of 0A to 10A. For values of VBURST less than 0.4V, IBURST is set at 0A. As the output load current drops, the peak inductor currents decrease to keep the output voltage in regulation. When the output load current demands a peak inductor current that is less than IBURST, the burst clamp will force the peak inductor current to remain equal to IBURST regardless of further reductions in the load current. Since the average inductor current is greater than the output load current, the voltage on the ITH pin will de- crease. When the ITH voltage drops to 350mV, sleep mode is enabled in which both power MOSFETs are shut off and switching action is discontinued to minimize power con- sumption. All circuitry is turned back on and the power MOSFETs begin switching again when the output voltage drops out of regulation. The value for IBURST is determined by the desired amount of output voltage ripple. As the value of IBURST increases, the sleep period between pulses and the output voltage ripple increase. The burst clamp voltage, VBURST, can be set by a resistor divider from the VFB pin to the SGND pin as shown in the Typical Applica- tion on the front page of this data sheet. Pulse skipping, which is a compromise between low out- put voltage ripple and efficiency during low load current operation, can be implemented by connecting the APPLICATIO S I FOR ATIO VFB VOUT R1 3418 F01 R2 SGND LTC3418 Figure 1. Setting the Output Voltage SYNC/MODE pin to ground. This sets IBURST to 0A. In this condition, the peak inductor current is limited by the mini- mum on-time of the current comparator; and the lowest output voltage ripple is achieved while still operating dis- continuously. During very light output loads, pulse skipping allows only a few switching cycles to be skipped while main- taining the output voltage in regulation. Voltage Tracking The LTC3418 allows the user to program how its output voltage ramps during start-up by means of the TRACK pin. Through this pin, the output voltage can be set up to either track coincidentally or ratiometrically follow another out- put voltage as shown in Figure 2. If the voltage on the TRACK pin is less than 0.8V, voltage tracking is enabled. During voltage tracking, the output voltage regulates to the tracking voltage through a resistor divider network. VOUT2 VOUT1 3418 F02a TIME VOUT2 VOUT1 3418 F02a TIME Figure 2a. Coincident Tracking Figure 2b. Ratiometric Sequencing |
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