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LTC3418 Datasheet(PDF) 15 Page - Linear Technology |
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LTC3418 Datasheet(HTML) 15 Page - Linear Technology |
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15 / 20 page ![]() 15 LTC3418 3418f PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3418. Check the following in your layout. 1. A ground plane is recommended. If a ground plane layer is not used, the signal and power grounds should be segregated with all small-signal components returning to the SGND pin at one point which is then connected to the PGND pin close to the LTC3418. 2. Connect the (+) terminal of the input capacitor(s), CIN, as close as possible to the PVIN pin. This capacitor provides the AC current into the internal power MOSFETs. 3. Keep the switching node, SW, away from all sensitive small-signal nodes. 4. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. You can connect the copper areas to any DC net (PVIN, SVIN, VOUT, PGND, SGND or any other DC rail in your system). 5. Connect the VFB pin directly to the feedback resistors. The resistor divider must be connected between VOUT and SGND. 6. To minimize switching noise coupling to SVIN, place a local filter between SVIN and PVIN. APPLICATIO S I FOR ATIO Figure 5. LTC3418 Layout Diagram Bottom Layer Top Layer |
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