LTC3418 datasheet(13/20 Pages) LINER

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LTC3418

3418f

2. I2R losses are calculated from the resistances of the

internal switches, RSW, and external inductor RL. In con-

tinuous mode the average output current flowing through

inductor L is “chopped” between the main switch and the

synchronous switch. Thus, the series resistance looking

into the SW pin is a function of both top and bottom

MOSFET RDS(ON) and the duty cycle (DC) as follows:

RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)

The RDS(ON) for both the top and bottom MOSFETs can be

obtained from the Typical Performance Characteristics

curves. Thus, to obtain I2R losses, simply add RSW to RL

and multiply the result by the square of the average output

current.

Other losses including CIN and COUT ESR dissipative

losses and inductor core losses generally account for less

than 2% of the total loss.

Thermal Considerations

In most applications, the LTC3418 does not dissipate

much heat due to its high efficiency.

But, in applications where the LTC3418 is running at high

ambient temperature with low supply voltage and high

duty cycles, such as in dropout, the heat dissipated may

exceed the maximum junction temperature of the part. If

the junction temperature reaches approximately 150°C,

both power switches will be turned off and the SW node

will become high impedance.

To avoid the LTC3418 from exceeding the maximum

junction temperature, the user will need to do some

thermal analysis. The goal of the thermal analysis is to

determine whether the power dissipated exceeds the

maximum junction temperature of the part. The tempera-

ture rise is given by:

TR = (PD)(θJA)

where PD is the power dissipated by the regulator and θJA

is the thermal resistance from the junction of the die to the

ambient temperature. For the 38-Lead 5mm × 7mm QFN

package, the θJA is 34°C/W.

APPLICATIO S I FOR ATIO

The junction temperature, TJ, is given by:

TJ = TA + TR

where TA is the ambient temperature.

Note that at higher supply voltages, the junction tempera-

ture is lower due to reduced switch resistance (RDS(ON)).

Checking Transient Response

The regulator loop response can be checked by looking at

the load transient response. Switching regulators take

several cycles to respond to a step in load current.

When a load step occurs, VOUT immediately shifts by an

amount equal to ∆ILOAD(ESR), where ESR is the effective

series resistance of COUT. ∆ILOAD also begins to charge or

discharge COUT generating a feedback error signal used by

the regulator to return VOUT to its steady-state value.

During this recovery time, VOUT can be monitored for

overshoot or ringing that would indicate a stability prob-

lem. The ITH pin external components and output capaci-

tor shown in the Typical Application on the front page of

this data sheet will provide adequate compensation for

most applications.

Design Example

As a design example, consider using the LTC3418 in an

application with the following specifications: VIN = 3.3V,

VOUT = 2.5V, IOUT(MAX) = 8A, IOUT(MIN) = 200mA, f = 1MHz.

Because efficiency is important at both high and low load

current, Burst Mode operation will be utilized.

First, calculate the timing resistor:

OSC ==

73 10

110

2 5

70 5

.•

•

–.

Use a standard value of 69.8k. Next, calculate the inductor

value for about 40% ripple current:

MHz

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