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RT7205AL Datasheet(PDF) 4 Page - Richtek Technology Corporation |
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RT7205AL Datasheet(HTML) 4 Page - Richtek Technology Corporation |
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4 / 36 page ![]() RT7205A 4 DS7205A-00 February 2018 www.richtek.com © Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Functional Pin Description Pin No. Pin Name Type Pin Function 1 V_TR AI Transformer voltage sense node. 2 CS+ AI Positive input of a current-sense amplifier for output current sensing. 3 CS- AI Negative input of a current-sense amplifier for output current sensing. 4 D- A/D IO USB D- channel. 5 D+ A/D IO USB D+ channel. 6 CC_GND GND Alternative ground for CC1 and CC2. 7 CC1 A/D IO Type-C connector Configuration Channel (CC) 1, used to detect a cable plug event and determine the cable orientation. 8 CC2 A/D IO Type-C connector Configuration Channel (CC) 2, used to detect a cable plug event and determine the cable orientation. 9 RT A/D I Remote thermal sensor connection node for over-temperature protection. 10 IFB AI Feedback input for the constant-current loop. 11 VFB AI Feedback input for the constant-voltage loop. 12 OPTO AO Current sink output for optocoupler connection. 13 OVP AO Over-voltage fault indication output, used to pull low an optocoupler. 14 USBP D IO Control signal of the blocking N-MOSFET 15 VDD PWR Supply input voltage. 16 VDD PWR Supply input voltage. 17 AGND GND Analog ground. 18 V2 PWR Regulated DC bias to supply for the MCU. 19 V5 PWR Regulated DC bias to supply for internal circuitry. 20 VCP AO Charge pump driver output. 21 V9 PWR Regulated DC bias to supply for the synchronous rectifier driver. 22 VG AO Gate driver output for the SR MOSFET. 23 PGND GND Power ground. 24 BLD D IO Bleeder connection node to provide another path to discharge the output capacitor. 25 (Exposed Pad) GND GND Power ground. The exposed pad must be connected to GND and well soldered to a large PCB copper area for maximum power dissipation. |
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