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ES8155 Datasheet(PDF) 20 Page - Suzhou Everest Semiconductor Co. Ltd. |
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ES8155 Datasheet(HTML) 20 Page - Suzhou Everest Semiconductor Co. Ltd. |
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20 / 33 page ![]() Everest Semiconductor ES8155 Version 1.0 3/29/2011 20 11000000 – -127 dB (default) 6.3.2 Register 0x0D – Right DAC Volume, Default 1100 0000 Bit Name Bit Description DACRVOL 7:0 Right DAC volume control 00000000 – 0 dB … 0.5 dB/step 11000000 – -127 dB (default) 6.3.3 Register 0x0E – DAC Control 1, Default 0101 0101 Bit Name Bit Description LP_DACL 7 0 – normal (default) 1 – low power setting for left DAC PDN_DACL 6 0 – not power down 1 – power down left DAC (default) LP_DACR 5 0 – normal (default) 1 – low power setting for right DAC PDN_DACR 4 0 – not power down 1 – power down right DAC (default) DACLMU 2 1 – left DAC mute (default) 0 – left DAC not mute DACRMU 0 1 – right DAC mute (default) 0 – right DAC not mute 6.3.4 Register 0x0F – DAC Control 2, Default 1100 0100 Bit Name Bit Description AUTOMUTE 7 Auto mute function: long period of zero inputs (8k audio samples) will mute the analog output. Any single non-zero input will un-mute. It is done per channel based. 0 – disable 1 – enable (default) CLICKFREE 6 0 – disable digital click free power up and down 1 – enable digital click free power up and down (default) VPPSCALE 5:4 Reserved DACLRBOTH 3 1 – enable simultaneous load of DACLVOL and DACRVOL set by DACLVOL 0 – disable simultaneous load (default) DACSOFTRAMP 2 1 – enable DAC soft ramp at mute and volume change (default) 0 – disable DACRAMPRATE 1:0 These bits define DAC gain control ramp rate 00 – 0.5 dB per 4 LRCKs (default) 01 – 0.5 dB per 8 LRCKs 10 – 0.5 dB per 16 LRCKs 11 – 0.5 dB per 32 LRCKs |
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