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LD5805GS Datasheet(PDF) 14 Page - Leadtrend Technology |
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LD5805GS Datasheet(HTML) 14 Page - Leadtrend Technology |
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14 / 18 page ![]() LD5805 06/15/2015 14 Leadtrend Technology Corporation www.leadtrend.com.tw LD5805-DS-01 June 2015 capacitor determine the loop stability. The inductor and output capacitor are chosen based on the performance, size and cost. The compensation resistor and capacitor at COMP are selected to optimize control loop stability. Thermal protection Thermal protection limits total power dissipation in this device. When the junction temperature reaches 150 C approximately, the thermal sensor signals the shutdown logic turning off this device. The thermal sensor will turn this device on again after the IC ’s junction temperature cools by 20 C. PCB Layout Guideline It’s recommended to separate the high frequency switching current from the low-level control signals in layout. The high switching current (MOSFET, inductor, LDR driver and LED return ends) may disturb the other low-level signals in the feedback loop and protection circuitry. As a result, it may cause the control function to behave abnormally. To avoid these issues, a few guidelines are recommended for the PCB layout, as below. 1. VCC bypass capacitor connected with signal ground must be placed as close as possible to the IC. The traces between capacitor and VCC pin should be kept as short as possible to avoid noise interference. 2. VIN bypass capacitor connected with signal ground must be placed as close as possible to the IC. The traces between capacitor and VIN pin should be kept as short as possible to avoid noise interference. 3. Use broader traces for VIN, VOUT and power ground. Components such as the power MOSFET and decoupling capacitors connected to VIN, VOUT and power ground, have high input/output current. To minimize power loss in these traces, the resistance of traces should be kept as low as possible. 4. Use broader traces between power MOSFET drain, inductor and diode. There is high current in these traces. To minimize power loss in these traces, the resistance of traces should be kept as low as possible. 5. Keep the LDR drive traces short and board between the IC driver output, LDR pin, and the power MOSFET. |
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