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ADP3419 Datasheet(PDF) 11 Page - Analog Devices |
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ADP3419 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 16 page ![]() ADP3419 Rev. A | Page 11 of 16 APPLICATION INFORMATION SUPPLY CAPACITOR SELECTION For the supply input (VCC) of the ADP3419, a local bypass capacitor is recommended to reduce the noise and to supply some of the peak currents drawn. Use a 10 µF or 4.7 µF multilayer ceramic (MLC) capacitor. MLC capacitors provide the best combination of low ESR and small size, and can be obtained from the following vendors. Table 5. Vendor Part Number Web Address Murata GRM235Y5V106Z16 www.murata.com Taiyo-Yuden EMK325F106ZF www.t-yuden.com Tokin C23Y5V1C106ZP www.tokin.com Keep the ceramic capacitor as close as possible to the ADP3419. BOOTSTRAP CIRCUIT The bootstrap circuit uses a charge storage capacitor (CBST) and a Schottky diode (D1), as shown in Figure 17. Selection of these components can be done after the high-side MOSFET has been chosen. The bootstrap capacitor must have a voltage rating that is able to handle at least 5 V more than the maximum supply voltage. The capacitance is determined by BST HSGATE BST V Q C ∆ = (1) where: QHSGATE is the total gate charge of the high-side MOSFET. ∆VBST is the voltage droop allowed on the high-side MOSFET drive. For example, two IRF7811 MOSFETs in parallel have a total gate charge of about 36 nC. For an allowed droop of 100 mV, the required bootstrap capacitance is 360 nF. A good quality ceramic capacitor should be used, and derating for the signifi- cant capacitance drop of MLCs at high temperature must be applied. In this example, selection of 470 nF or even 1 µF would be recommended. A Schottky diode is recommended for the bootstrap diode due to its low forward drop, which maximizes the drive available for the high-side MOSFET. The bootstrap diode must also be able to handle at least 5 V more than the maximum battery voltage. The average forward current can be estimated by (2) MAX HSGATE AVG F f Q I × = ) ( where fMAX is the maximum switching frequency of the controller. POWER AND THERMAL CONSIDERATIONS The major power consumption of the ADP3419-based driver circuit is from the dissipation of MOSFET gate charge. It can be estimated as MAX LSGATE HSGATE MAX f Q Q VCC P × + × ≈ ) ( (3) where: VCC is the supply voltage 5 V. fMAX is the highest switching frequency. QHSGATE and QLSGATE are the total gate charge of high-side and low-side MOSFETs, respectively. For example, the ADP3419 drives two IRF7821 high-side MOSFETs and two IRF7832 low-side MOSFETs. According to the MOSFET data sheets, QHSGATE = 18.6 nC and QLSGATE = 68 nC. Given that fMAX is 300 kHz, PMAX would be about 130 mW. Part of this power consumption generates heat inside the ADP3419. The temperature rise of the ADP3419 against its environment is estimated as η × × θ ≈ ∆ MAX JA P T (4) where θJA is ADP3419’s thermal resistance from junction to air, given in the absolute maximum ratings as 220°C/W for a 4-layer board. The total MOSFET drive power dissipates in the output resistance of ADP3419 and in the MOSFET gate resistance as well. η represents the ratio of power dissipation inside the ADP3419 over the total MOSFET gate driving power. For normal applications, a rough estimation for η is 0.7. A more accurate estimation can be calculated using ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + × + + × × + + ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + × + + + × × + ≈ η LSGATE LSGATE LSGATE HSGATE LSGATE HSGATE HSGATE LSGATE HSGATE HSGATE R R4 R4 R R3 R3 Q Q Q R R2 R2 R R R1 R1 Q Q Q 5 . 0 5 . 0 5 . 0 5 . 0 (5) where: R1 and R2 are the output resistances of the high-side driver: R1 = 1.7 (DRVH − BST), R2 = 0.8 (DRVH − SW). R3 and R4 are the output resistances of the low-side driver: R3 = 1.7 (DRVL − VCC), R4 = 0.8 (DRVL − GND). R is the external resistor between the BST pin and the BST capacitor. RHSGATE and RLSGATE are gate resistances of high-side and low-side MOSFETs, respectively. Assuming that R = 0 and that RHSGATE = RLSGATE = 0.5, Equation 5 gives a value of η = 0.71. Based on Equation 4, the estimated temperature rise in this example is about 22°C. |
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