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GS3471 Datasheet(PDF) 121 Page - Semtech Corporation |
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GS3471 Datasheet(HTML) 121 Page - Semtech Corporation |
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121 / 179 page ![]() GS3471 Final Data Sheet Rev.4 PDS-060498 September 2017 121 of 179 Semtech www.semtech.com 811 POWER_DOWN RSVD 15:4 — — Reserved. PD_CSR_ACCESS 3:3 RW 0 CSR access selection during power-down: 0 = Selects no CSR access during power-down when PWR_DWN is asserted 1 = Selects CSR access during power-down when PWR_DWN is asserted RC_BYP 2:2 RW 0 Retimer bypass selection: 0 = Selects retimed data (when DDO is enabled) 1 = Selects non-retimed data (when DDO is enabled) SERIAL_LOOPBACK_EN 1:1 RW 0 Serial loopback enable: 0 = The serial digital output signals DDO and DDO are disabled 1 = The serial digital output signals DDO and DDO are enabled PD_PCLK_ENABLE 0:0 RW 0 PCLK enabled during power-down: 0 = Selects PCLK to be shut off when PWR_DWN is asserted 1 = Selects PCLK to be output when PWR_DWN is asserted 812 IO_CONFIG RSVD 15:15 — — Reserved. STAT2_CONFIG 14:10 RW 2 Configures STAT2 output pin: 00000b = H/HSYNC 00001b = V/VSYNC 00010b = F/DE 00011b = LOCKED 00100b = Y/1ANC 00101b = C/2ANC 00110b = DATA ERROR 00111b = VIDEO ERROR (GLOBAL_ERR) 01000b = AUDIO ERROR 01001b = EDH_DETECT 01010b = Carrier Detect (active LOW) 01011b = SD_HD 01100b = 3G_HD 01101b to 11111b = Reserved STAT1_CONFIG 9:5 RW 1 Configure STAT1 output pin. Refer to STAT2_CONFIG for decoding. STAT0_CONFIG 4:0 RW 0 Configure STAT0 output pin. Refer to STAT2_CONFIG for decoding. Table 5-9: Video Core CSR Descriptions (Continued) Addressh Register Name Parameter Name Bit Slice R/W Reset Valueh Description |
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