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AM5728 Datasheet(PDF) 160 Page - Texas Instruments

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Part # AM5728
Description  Sitara Processors Silicon Revision 2.0
PDF  415 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM5728 Datasheet(HTML) 160 Page - Texas Instruments

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AM5729, AM5728, AM5726
SPRS953F – DECEMBER 2015 – REVISED MAY 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM5729 AM5728 AM5726
Specifications
Copyright © 2015–2019, Texas Instruments Incorporated
5.4
Recommended Operating Conditions
The device is used under the recommended operating conditions described in Table 5-4.
NOTE
Logic functions and parameter values are not assured out of the range specified in the
recommended operating conditions.
Table 5-4. Recommended Operating Conditions
PARAMETER
DESCRIPTION
MIN (2)
NOM
MAX DC (3)
MAX (2)
UNIT
Input Power Supply Voltage Range
vdd
Core voltage domain supply
See Section 5.5
V
vdd_mpu
Supply voltage range for MPU domain
See Section 5.5
V
vdd_gpu
GPU voltage domain supply
See Section 5.5
V
vdd_dspeve
DSP voltage domain supply
See Section 5.5
V
vdd_iva
IVA voltage domain supply
See Section 5.5
V
vdd_rtc
RTC voltage domain supply
See Section 5.5
V
vdda_usb1
DPLL_USB and HS USB1 1.8V
analog power supply
1.71
1.80
1.836
1.89
V
Maximum noise (peak-peak)
50
mVPPmax
vdda_usb2
HS USB2 1.8V analog power supply
1.71
1.80
1.836
1.89
V
Maximum noise (peak-peak)
50
mVPPmax
vdda33v_usb1
HS USB1 3.3V analog power supply.If
USB1 is not used, this pin can
alternatively be connected to VSS if
the following requirements are met:
- The usb1_dm/usb1_dp pins are left
unconnected
- The USB1 PHY is kept powered
down
3.135
3.3
3.366
3.465
V
Maximum noise (peak-peak)
50
mVPPmax
vdda33v_usb2
HS USB2 3.3V analog power supply. If
USB2 is not used, this pin can
alternatively be connected to VSS if
the following requirements are met:
- The usb2_dm/usb2_dp pins are left
unconnected
- The USB2 PHY is kept powered
down
3.135
3.3
3.366
3.465
V
Maximum noise (peak-peak)
50
mVPPmax
vdda_abe_per
DPLL_ABE, DPLL_PER, and PER
HSDIVIDER analog power supply
1.71
1.80
1.836
1.89
V
Maximum noise (peak-peak)
50
mVPPmax
vdda_ddr
DPLL_DDR and DDR HSDIVIDER
analog power supply
1.71
1.80
1.836
1.89
V
Maximum noise (peak-peak)
50
mVPPmax
vdda_debug
DPLL_DEBUG analog power supply
1.71
1.80
1.836
1.89
V
Maximum noise (peak-peak)
50
mVPPmax
vdda_dsp_eve
DPLL_DSP analog power supply
1.71
1.80
1.836
1.89
V
Maximum noise (peak-peak)
50
mVPPmax
vdda_gmac_core
DPLL_CORE and CORE HSDIVIDER
analog power supply
1.71
1.80
1.836
1.89
V
Maximum noise (peak-peak)
50
mVPPmax
vdda_gpu
DPLL_GPU analog power supply
1.71
1.80
1.836
1.89
V
Maximum noise (peak-peak)
50
mVPPmax



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