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AM5728 Datasheet(PDF) 350 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 350 Page - Texas Instruments |
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350 / 415 page  1 MDIO_CLK (Output) MDIO_DATA (Output) SPRS91x_TIMING_PRU_MII_RT_03 MDIO_CLK 2 3 1 4 4 SPRS91x_TIMING_PRU_MII_RT_02 350 AM5729, AM5728, AM5726 SPRS953F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-146. PRU-ICSS MDIO Switching Characteristics - MDIO_CLK NO. PARAMETER DESCRIPTION MIN MAX UNIT 1 tc(MDC) Cycle time, MDC 400 ns 2 tw(MDCH) Pulse duration, MDC high 160 ns 3 tw(MDCL) Pulse duration, MDC low 160 ns 4 tt(MDC) Transition time, MDC 5 ns Figure 7-102. PRU-ICSS MDIO_CLK Timing Table 7-147. PRU-ICSS MDIO Switching Characteristics – MDIO_DATA NO. PARAMETER DESCRIPTION MIN MAX UNIT 1 td(MDC-MDIO) Delay time, MDC high to MDIO valid 0 390 ns Figure 7-103. PRU-ICSS MDIO_DATA Timing – Output Mode 7.25.3.2 PRU-ICSS MII_RT Electrical Data and Timing NOTE In order to ensure the MII_RT IO timing values published in the device data manual, the PRUSS_GICLK clock must be configured for 200MHz (default value) and the TX_CLK_DELAY bitfield in the PRUSS_MII_RT_TXCFG0/1 register must be configured as follows: • 100 Mbps mode: 6h (non-default value) • 10 Mbps mode: 0h (default value) Table 7-148. PRU-ICSS MII_RT Timing Requirements – MII[x]_RXCLK NO. PARAMETER DESCRIPTION SPEED MIN MAX UNIT 1 tc(RX_CLK) Cycle time, RX_CLK 10 Mbps 399.96 400.04 ns 100 Mbps 39.996 40.004 ns 2 tw(RX_CLKH) Pulse duration, RX_CLK high 10 Mbps 140 260 ns 100 Mbps 14 26 ns 3 tw(RX_CLKL) Pulse duration, RX_CLK low 10 Mbps 140 260 ns 100 Mbps 14 26 ns |
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