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AM5728 Datasheet(PDF) 351 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 351 Page - Texas Instruments |
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351 / 415 page  MII_TXCLK 2 3 1 4 4 SPRS91x_TIMING_PRU_MII_RT_05 MII_RXCLK 2 3 1 SPRS91x_TIMING_PRU_MII_RT_04 351 AM5729, AM5728, AM5726 www.ti.com SPRS953F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Figure 7-104. PRU-ICSS MII[x]_RXCLK Timing Table 7-149. PRU-ICSS MII_RT Timing Requirements - MII[x]_TXCLK NO. PARAMETER DESCRIPTION SPEED MIN MAX UNIT 1 tc(TX_CLK) Cycle time, TX_CLK 10 Mbps 399.96 400.04 ns 100 Mbps 39.996 40.004 ns 2 tw(TX_CLKH) Pulse duration, TX_CLK high 10 Mbps 140 260 ns 100 Mbps 14 26 ns 3 tw(TX_CLKL) Pulse duration, TX_CLK low 10 Mbps 140 260 ns 100 Mbps 14 26 ns 4 tt(TX_CLK) Transition time, TX_CLK 10 Mbps 3 ns 100 Mbps 3 ns Figure 7-105. PRU-ICSS MII[x]_TXCLK Timing Table 7-150. PRU-ICSS MII_RT Timing Requirements - MII_RXD[3:0], MII_RXDV, and MII_RXER NO. PARAMETER DESCRIPTION SPEED MIN MAX UNIT 1 tsu(RXD-RX_CLK) Setup time, RXD[3:0] valid before RX_CLK 10 Mbps 8 ns tsu(RX_DV-RX_CLK) Setup time, RX_DV valid before RX_CLK tsu(RX_ER-RX_CLK) Setup time, RX_ER valid before RX_CLK tsu(RXD-RX_CLK) Setup time, RXD[3:0] valid before RX_CLK 100 Mbps 8 ns tsu(RX_DV-RX_CLK) Setup time, RX_DV valid before RX_CLK tsu(RX_ER-RX_CLK) Setup time, RX_ER valid before RX_CLK 2 th(RX_CLK-RXD) Hold time RXD[3:0] valid after RX_CLK 10 Mbps 8 ns th(RX_CLK-RX_DV) Hold time RX_DV valid after RX_CLK th(RX_CLK-RX_ER) Hold time RX_ER valid after RX_CLK th(RX_CLK-RXD) Hold time RXD[3:0] valid after RX_CLK 100 Mbps 8 ns th(RX_CLK-RX_DV) Hold time RX_DV valid after RX_CLK th(RX_CLK-RX_ER) Hold time RX_ER valid after RX_CLK |
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