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ADV202 Datasheet(PDF) 17 Page - Analog Devices |
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ADV202 Datasheet(HTML) 17 Page - Analog Devices |
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17 / 40 page ![]() ADV202 Rev. 0 | Page 17 of 40 RAW PIXEL MODE TIMING Table 12. Parameter Description Min Typ Max Unit VDATATD VCLK to PIXELDATA Valid Delay (PIXELDATA Output) 12 ns VDATASU PIXELDATA Setup to Rising VCLK (PIXELDATA Input) 4 ns VDATAHD PIXELDATA Hold from Rising VCLK (PIXELDATA Input) 4 ns VRDYTD VCLK to VRDY Valid Delay 12 ns VFRMSU VFRM Setup to Rising VCLK (VFRAME Input) 3 ns VFRMHD VFRM Hold from Rising VCLK (VFRAME Input) 4 ns VFRMTD VCLK to VFRM Valid Delay (VFRAME Output) 12 ns VSTRBSU VSTRB Setup to Rising VCLK 4 ns VSTRBHD VSTRB Hold from Rising VCLK 3 ns NN 0 1 2 VCLK VCLK PIXEL DATA(IN) PIXEL DATA VFRM(OUT) VFRM(IN) VRDY VSTRB N–1 N 0 1 2 VRFMTD VDATATD VSTRBSU VSTRBHD VFRMSU VFRMHD VDATAHD VDATASU VRDYTD Figure 22. Raw Pixel Mode Timing |
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