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ARM926EJ Datasheet(PDF) 98 Page - List of Unclassifed Manufacturers |
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ARM926EJ Datasheet(HTML) 98 Page - List of Unclassifed Manufacturers |
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98 / 236 page ![]() Caches and Write Buffer 4-4 Copyright © 2001-2008 ARM Limited. All rights reserved. ARM DDI 0198E 4.2 Write buffer The write buffer is used for all writes to a noncacheable, bufferable region, write-through region, and write misses to a write-back region. A separate buffer is incorporated in the DCache for holding write-back data for cache line evictions or cleaning of dirty cache lines. The main write buffer has a 16-word data buffer and a four-address buffer. The DCache write-back buffer has eight data word entries and a single address entry. The MCR drain write buffer instruction enables both write buffers to be drained under software control. The MCR wait for interrupt causes both write buffers to be drained and the ARM926EJ-S processor to be put into a low-power state until an interrupt occurs. Write buffer behavior is described in Table 4-4 on page 4-6. No forwarding takes place for read accesses that have corresponding pending writes in the write buffer. For such accesses the write buffer is drained and the value fetched from external memory. |
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