HD64F2145 datasheet(439/829 Pages) RENESAS

Part #	HD64F2145

Description	Hitachi 16-Bit Single-Chip Microcomputer

PDF	829 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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439 / 829 page

Rev. 2.0, 08/02, page 399 of 788

16.3.3

Second Slave Address Register (SARX)

SARX sets the second slave address and selects the communication format. In slave mode,

transmit/receive operations by the DTC are possible when the received address matches the

second slave address. If the LSI is in slave mode with the I

2C bus format selected, when the FSX

bit is set to 0 and the upper 7 bits of SARX match the upper 7 bits of the first frame received after

a start condition, the LSI operates as the slave device specified by the master device. SARX can be

accessed only when the ICE bit in ICCR is cleared to 0.

Bit

Bit Name

Initial Value R/W

Description

SVAX6

SVAX5

SVAX4

SVAX3

SVAX2

SVAX1

SVAX0

R/W

Second Slave Address 6 to 0

Set the second slave address.

FSX

R/W

Format Select X

Selects the communication format together with the FS bit

in SAR and the SW bit in DDCSWR. Refer to table 16.2.

HD64F2145 Datasheet(PDF) 439 Page - Renesas Technology Corp