REV. D

ADP3041

–13–

COMP

FB

ERROR

AMP

C2

gm

REF

Figure 2. Compensation Components

The boost regulator introduces a right half plane (RHP) zero. This

zero behaves like a zero with respect to the gain but behaves

like a pole with respect to phase. As a result, the RHP zero can

cause instability of the control loop if the bandwidth (in Hertz)

of the loop includes it.

f

RHP

V

V

R

L

Z

IN

OUT

LOAD









×

×

2

2

π

(8)

Note that the RHP zero is dependant on the load. To optimize

the compensation, a nominal load must be chosen. Typically,

load works well; but make sure that this load is enough to ensure

CCM is given by

R

Lf

V

V

V

V

CRIT

SW

IN

OUT

IN

OUT

=

××

















2

1

2

–

(9)

To make sure the RHP zero does not cause stability problems,

the control loop bandwidth should be set at around 1/8 the

frequency (in Hertz) of the RHP zero.

ff

RHP

CZ

=×

()

1

8

(10)

Another frequency of interest is the pole caused by the output

load and output capacitor. This frequency (in Hertz) is calcu-

lated using

f

RC

P

LOAD

OUT

1

1

2

=

××

π

(11)

Note that the frequency varies with load current. Again, use the

nominal load resistance for the calculation.

gain can be approximated (in dB) by

Gf

VR

V

–

f

f

OC

C

IN

LOAD

OUT

C

P

×

×









+

























20

0.65

20log

1

1

2

log

(12)

R

g

V

V

C

m

FB

OUT

G

OC f C

=

××

()

1

(13)

Once the value of the compensation resistor is determined, the

compensation capacitor sets up a zero to cancel out the pole

varies with load current, the compensation zero should be located

approximately four times the worst-case load pole, 4

one half the crossover frequency, 1/2

× f

The frequency of the compensation zero is located at

f

RC

ZC

CC

=

××

×

1

2

π

(14)

C

fR

C

ZC

C

=

××

×

1

2

π

(15)

If the output capacitor selected has a high ESR value, it may be

necessary to add another pole to cancel the zero introduced by

the capacitor’s ESR. The ESR zero location is determined by

f

ESR

RC

Z

ESR

OUT

××

×

1

2

π

(16)

So, a high frequency pole should be placed to cancel the ESR

zero or at half the switching frequency, whichever is lower. By

placing a pole at half the switching frequency, the high fre-

quency gain is rolled off for better phase margin. Note that the

high frequency pole must be at least a decade above the com-

pensation zero in order for the compensation to work properly.

If this is not the case, the high frequency pole should not be used.

C

C

fR

C

C

PHF

CC

2

12

=

+×

×

×

()

()

π

(17)

After all the compensation components have been selected, the

best check for stability and response time is to observe the tran-