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CS8920A Datasheet(PDF) 89 Page - Cirrus Logic |
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CS8920A Datasheet(HTML) 89 Page - Cirrus Logic |
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89 / 144 page ![]() 5.2.2 Receive Configuration After each reset, the CS8920A must be config- ured for receive operation. This can be done automatically using an attached EEPROM, or by wr iting configur ation commands to th e CS8920A’s internal registers (see Section 3.3). The items that must be configured include: • which physical interface to use; • which types of frames to accept; • which receive events cause interrupts; and, • how received frames are transferred. Configuring the Physical Interface: Configuring the physical interface consists of determining which Ethernet interface should be active and enabling the receive logic for serial reception. This is done via the LineCTL register (Register 13) and is described in Table 5.1. Choosing Which Frame Types to Accept: The RxCTL register (Register 5) is used to determine which frame types will be accepted by the CS8920A (a receive frame is said to be "ac- cepted" when the frame is buffered, either on chip or in host memory via DMA). Table 5.2 de- scribes the configuration bits in this register. Refer to Section 5.3 for a detailed description of Destination Address filtering. Selecting Which Events Cause Interrupts: The RxCFG register (Register 3) and the BufCFG register (Register B) are used to determine which receive events will cause interrupts to the host processor. Table 5.3 describes the interrupt en- able (iE) bits in these registers. Register 13, LineCTL Bit Bit Name Operation 6 SerRxON When set, reception enabled. 8 AUIonly W hen set, AU I s e l e cted (takes precedence over AutoAUI/10BT). 9 AutoAUI/ 10BT When set, automatic interface selection enabled. When both bits 8 and 9 are clear, 10BASE-T selected. ELoRx Squelch W he n s et , r eceiver squelc h level reduced by approximately 6 dB. Table 5.1. Physical Interface Configuration Register 5, RxCTL Bit Bit Name Operation 6 IAHashA When set, Individual Address frames that pass the hash filter are accepted*. 7Promis cuousA When set, all frames are accepted*. 8 RxOKA When set, frames with valid length and CRC and that pass the DA filter are accepted. 9 MulticastA When set, Multicast frames that pass the hash filter accepted*. A IndividualA When set, frames with DA that matches the IA at PacketPage base + 0158h are accepted*. B BroadcastA When set, all broadcast frames are accepted*. C CRCerrorA When set, frames with bad CRC that pass the DA filter are accepted. D RuntA when set, frames shorter than 64 bytes that pass the DA filter are accepted. E ExtradataA When set, frames longer than 1518 byt es that pass the DA fil ter are accepted (only the first 1518 bytes are buffered). * Must also meet the criteria programmed into bits 8, C, D, and E. Table 5.2. Frame Acceptance Criteria Register 3, RxCFG Bit Bit Name Operation 8 RxOKiE When set, there is an interrupt if a frame is received with valid length and CRC*. C CRCerroriE When set, there is an interrupt if a frame is received with bad CRC*. D RuntiE When set, there is an interrupt if a frame is received that is shorter than 64 bytes*. E ExtradataiE When set, there is an interrupt if a frame is received that is longer than 1518 bytes*. * Must also pass the DA filter before there is an interrupt. CS8920A DS238PP2 89 |
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