CS8920A datasheet(40/144 Pages) CIRRUS

40 / 144 page

Receive and Transmit Frame Locations

The Receive and Transmit Frame PacketPage lo-

cations are used to transfer Ethernet frames to

and from the host. The host simply writes to and

reads from these locations, and internal buffer

memory is dynamically allocated between trans-

mit and receive as needed. This provides more

efficient use of buffer memory and better overall

network performance. As a result of this dynamic

allocation, only one receive frame (starting at

PacketPage base + 0400h) and one transmit

frame (starting at PacketPage base + 0A00h) are

directly accessible. See Section 4.9.

4.2

PacketPage Memory Map

Table 4.1 shows the CS8920A PacketPage mem-

ory address map:

Table 4.1 is continued on the next page.

Base

# of

Bytes

Type

Description

Cross

Reference

Bus Interface Registers

0000h

Read-only

32-bit Product Identification Code

Section 4.3

0004h

Reserved

Note 2

0026h

Read-only

ISA RxDMA Start of Frame 16-bit Offset to Status

Sections 4.3, 4.12

0028h

Read-only

ISA RxDMA 12-bit Frame Count

Sections 4.3

002Ah

Read-only

ISA RxDMA Byte Count 16 bit

Sections 4.3

002Ch

Reserved. Do Not Write to This Space.

Note 2

0040h

Read/Write

EEPROM Command Register

Sections 3.6, 4.3

0042h

Read/Write

EEPROM Data Word

Sections 3.6, 4.3

0044h

Reserved. Do Not Write to This Space.

Note 2

0048h

Read

Link Partner Ability in Auto Negotiation

Note 2

004Ah

Read/Write

Reserved. Do Not Write to This Space.

Sections 3.6, 4.3

0050h

Read-only

Receive Frame byte counter

Sections 4.3, 5.2.9

0052h

174

Reserved

Note 2

Status and Control Registers

0100h

CS8920A Config/Control Registers (two bytes per coded

value)

Section 4.4, 4.5

0120h

CS8920A Status/Event Registers, ISQ is 0120h

Section 4.4, 4.5

0140h

Read-only

Reserved. Do Not Use.

Note 2

0142h

Reserved. Do Not Write to This Space.

Note 2

NOTES:

1) All registers are accessed as words only.

2) Read operation from the reserved location provides undefined data. Writing to a reserved location or

undefined bits may result in unpredictable operation of the CS8920A.

Table 4.1. PacketPage Memory Address Map

CS8920A

DS238PP2

CS8920A Datasheet(PDF) 40 Page - Cirrus Logic

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