CS8920A datasheet(91/144 Pages) CIRRUS

91 / 144 page

detecting the incoming frame’s End-of-Frame

(EOF) sequence.

Like all Event bits, RxDest and Rx128 are set by

the CS8920A whenever the appropriate event oc-

curs. Unlike other Event bits, RxDest and Rx128

may be cleared by the CS8920A without host in-

tervention. All other event bits are cleared only

by the host reading the appropriate event register,

either directly or through the Interrupt Status

Queue (ISQ). (RxDest and Rx128 can also be

cleared by the host reading the BufEvent register,

either directly or through the Interrupt Status

Queue). Figure 5.4 provides a diagram of the

Early Interrupt process.

Acceptance Filtering: The third step of pre-proc-

essing is to determine whether or not to accept

the frame by comparing the frame with the crite-

ria programmed into the RxCTL register

(Register 5). When the receive frame passes the

Acceptance filter, the frame is buffered, either on

chip or in host memory via DMA. If the frame

fails the Acceptance filter, it is discarded. The re-

sults of the Acceptance filter are reported in the

RxEvent register (Register 4).

Normal Interrupt Generation: The final step of

pre-processing is to generate any enabled inter-

rupts that are triggered by the incoming frame.

Interrupt generation occurs when the entire frame

has been buffered (up to the first 1518 bytes).

For more information about interrupt generation,

see Section 5.1.

5.2.4

Held vs. DMAed Receive Frames

All accepted frames are either held in on-chip

RAM until processed by the host, or stored in

host memory via DMA. A receive frame that is

held in on-chip RAM is referred to as a held re-

ceive frame. A frame that is stored in host

memory via DMA is a DMAed receive frame.

This section describes buffering and transferring

held receive frames. Sections 5.5 through 5.7 de-

scribe DMAed receive frames.

Pass

DA Filter?

Discard Frame

Destination

Address Filter

Check:

- PromiscuousA?

- IAHashA?

- MulticastA?

- IndividualA?

- BroadcastA?

Receive Frame

Yes

Generate Interrupts

Check:

- RxOKiE?

- ExtradataiE?

- CRCerroriE?

- RuntiE?

- RxDMAiE?

Pre-Processing

Complete

Generate Early

Interrupts if Enabled

(see figure 5.3)

Acceptance Filter

Check:

- RxOKA?

- ExtradataA?

- RuntA?

- CRCerrorA?

Status of receive

frame reported in

RxEvent register,

frame discarded.

Status of receive

frame reported in

RxEvent register,

frame accepted

into on-chip RAM

Pass

Accept.

Filter?

Figure 5.3. Receive Frame Pre-Processing

CS8920A

DS238PP2

CS8920A Datasheet(PDF) 91 Page - Cirrus Logic

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