CS8920A datasheet(43/144 Pages) CIRRUS

43 / 144 page

Bus Interface Register:

DMA Start-of-Frame (Read only)

Address: PacketPage base + 0026h

Address 0027h

Address 0026h

Most-significant byte of offset value

Least-significant byte of offset value

The DMA Start-of-Frame Register contains a 16-bit value which defines the offset from the DMA base address to

the start of the most recently transferred received frame. See Section 5.5.

This register’s initial state after reset is:

0000 0000

Bus Interface Register:

DMA Frame Count (Read only)

Address: PacketPage base + 0028h

Address 0029h

Address 0028h

Most-significant byte of frame count

(most-significant nibble always 0h)

Least-significant byte of frame count

The lower 12 bits of the DMA Frame Count register define the number of valid frames transferred via DMA since

the last readout of this register. The upper 4 bits are reserved. See Section 5.5.

This register’s initial state after reset is:

XXXX 0000 0000 0000

Bus Interface Register:

RxDMA Byte Count (Read only)

Address: PacketPage base + 002Ah

Address 002Bh

Address 002Ah

Most-significant byte of byte count.

Least-significant byte of byte count.

The RxDMA Byte Count register describes the valid number of bytes DMAed since the last readout. See Section

5.5.

This register’s initial state after reset is:

0000 0000

CS8920A

DS238PP2

CS8920A Datasheet(PDF) 43 Page - Cirrus Logic