SL2S2602 datasheet(10/55 Pages) NXP

10 / 55 page

NXP Semiconductors

SL2S2602

ICODE SLIX2

SL2S2602

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Product data sheet

Rev. 4.1 — 25 July 2017

COMPANY PUBLIC

276341

10 / 55

Shear strength

>70 MPa

Height

25 μm[1]

Height uniformity

within a die

±2 μm

within a wafer

±3 μm

wafer to wafer

±4 μm

Bump flatness

±1.5 μm

Bump size

LA, LB

80 μm × 80 μm

TEST, GND

60 μm × 60 μm

variation

±5 μm

Under bump metallization

sputtered TiW

1. Because of the 7 µm spacer, the bump will measure 18 µm relative height protruding

the spacer.

8.1.1 Fail die identification

No inkdots are applied to the wafer.

Electronic wafer mapping (SECS II format) covers the electrical test results and

additionally the results of mechanical/visual inspection.

See Ref. 6 "General specification for 8" wafer on UV-tape with electronic fail die

marking".

8.1.2 Map file distribution

See Ref. 6 "General specification for 8" wafer on UV-tape with electronic fail die

marking".

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