UP9511P datasheet(8/17 Pages) UPI

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uP9511

uP9511-DS-C3100, Feb. 2016

www.upi-semi.com

Functional Description

Total Load Current Sense

The uP9511 uses a low input offset current sense amplifier

(CSA) to sense the total load current flowing through

inductors for droop function by CSPSUM and CSNSUM as

shown in Figure 5.

RPH8

RPH2

RPH1

1ohm

VOUT

PH1

PH2

PH8

CSPSUM

RSUM

CSNSUM

ISUM

CSUM

1ohm

VOUT

Figure 5. Total Load Current Sense

The voltage across C

SUM is proportional to the total load

current, and the output current of CSA(I

SUM) is also

proportional to the total load current of the voltage regulator.

The sensed current I

SUM represents the total output current

of the regulator, and it is directly used for droop function,

total output over current protection and auto-phase

function. I

SUM is calculated as follows.

SUM

OUT

SUM

In this inductor current sensing topology, R

PH and CSUM

must be selected according to the equation below:

SUM

where R

DC is the DCR of the output inductor L, N is the

operation phase number. Theoretically, k should be equal

to 1 to sense the instantaneous total load current. But in

real application, k is usually between 1.2 to 1.8 for better

load transient response. Note that the resistance value of

SUM must be less than 2kΩ to ensure the current sensing

circuit in normal operation.

Voltage Control Loop

Figure 6 illustrates the voltage control loop of the uP9511.

FB and EAP are negative and positive inputs of the Error

Amplifier respectively. The Error Amplifier modulates the

COMP voltage V

COMP and the duty cycle of buck converter

to force FB voltage VFB follows V

EAP. The sensed current

signal (I

SUM) is mirrored to the EAP pin and creates voltage

at EAP pin as:

SUM

EAP

−

where V

SS is output of VREFIN, ISUM is a current source

proportional to output current, and R

LL is an external resistor

for adjusting load line slope. Therefore, the output voltage

will be:

SUM

OUT

−

NVVDD_SENSE

EAP

RLL

NVVDD_GND_SENSE

FBRTN

COMP

ICSN

Positive

remote sense

pin of GPU

Negative

remote sense

pin of GPU

REFIN

Figure 6. Voltage Control Loop

Output Voltage Differential Sense

The uP9511 uses differential sense by a high-gain low offset

error amplifier for output voltage differential sense as shown

in Figure 7. The GPU voltage is sensed by the FB and

FBRTN pins. FB pin is connected to the positive remote

sense pin NVVDD_SENSE of the GPU via the resistor R

FB.

FBRTN pin is connected to the negative remote sense pin

NVVDD_GND_SENSE of GPU directly.

Soft Start and Power Up Sequence

The uP9511 features a programmable soft start function to

limits the prevent surge current from power supply input

by a soft-start capacitor C

SS connected between SS to

FBRTN pin. Controller starts the soft-start process right on

EN>0.6V with typical 2ms initialization time (TINIT). When

soft-start cycle is initiated, an internal current source

charges the C

SS to VREFIN. The ramp up time (Tramp) during

soft start period is determined by the internal current source

and C

SS, and it can be calculated as below.

BOOT

REFIN

Tramp

For example, suppose V

REFIN, BOOT = 0.9V, CSS = 22nF, ISS =

13uA, the ramp up time is around 1.5ms.

If there is no fault detected at the end of soft-start, the

controller then asserts PGOOD when the output voltage

reaches its target without delay. Figure 7 shows the soft-

start sequence of the uP9511.

UP9511P Datasheet(PDF) 8 Page - uPI Group Inc.

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