TLE9461ES datasheet(117/140 Pages) INFINEON

117 / 140 page

TLE9461ES

Lite CAN SBC Family

Serial Peripheral Interface

Datasheet

117

Rev.1.1

2019-09-27

Notes

1. The SYS_STATUS_CTRL_0 register is an exception for the default values, i.e. it will keep its configured value

also after a Soft Reset.

2. This byte is intended for storing system configurations of the ECU by the microcontroller and is only writable

in SBC Normal Mode and readable in SBC Stop Mode. The byte is not accessible by the SBC and contents are

kept also after SBC Fail-Safe, Restart Mode or after Soft Reset. It allows the microcontroller to store system

configuration without loosing the data as long as the SBC supply voltage is above VPOR,f.

Notes

1. The SYS_STATUS_CTRL_1 register has the same functionality and behavior as SYS_STATUS_CTRL_0.

SYS_STATUS_CTRL_0

System Status Control Low Byte (Address 001 1110B)

POR Value: 0000 0000B;

Restart Value/Soft Reset Value: xxxx xxxxB

SYS_STAT_L

Field

Bits

Type

Description

SYS_STAT_L 7:0

System Status Control Low Byte (bit0=LSB; bit7=MSB)

Dedicated byte for system configuration, access only by

microcontroller. Cleared after power up and Soft Reset

SYS_STATUS_CTRL_1

System Status Control High Byte (Address 001 1111B)

POR Value: 0000 0000B;

Restart Value/Soft Reset Value: xxxx xxxxB

SYS_STAT_H

Field

Bits

Type

Description

SYS_STAT_H 7:0

System Status Control High Byte (bit8=LSB; bit15=MSB)

Dedicated byte for system configuration, access only by

microcontroller. Cleared after power up and Soft Reset

TLE9461ES Datasheet(PDF) 117 Page - Infineon Technologies AG

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