VSC7440 datasheet(299/444 Pages) MICROSEMI

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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

282

The modes defined in the following table comply with commonly used methods of transferring timing

information in a multichip system, but are as such not specified in the IEEE 1588 standard.

The time of day counters are generated in the DEVCPU block where there are various means of

accurately updating the time. For more information, see Time of Day Generation, page 286. The output

from the DEVCPU block is a set of timing parameters listed in the following table.

The PTP frame flow through the device is shown in the following illustration.

Figure 84 •

Frame Flow

The time stamps generated by the ports are samples of the NSF value. The ingress time is the time at

which the PCS sees the start of frame, synchronized to the system clock domain. The correct 1588

Table 213 •

Timing Parameters

Parameter

Description

NSF (32 bit)

Counts number of nanoseconds since PTP was enabled in the device. Wraps at 232.

TOD_nsec (30 bit)

Counts the number of nanoseconds of current time of day. Wraps at 109, and will potentially be

in synch with the partner devices.

TOD_secs (48 bit)

Counts number of seconds of current time of day. Wraps at 248.

NSX48

Counts number of nanoseconds. NSX48 always take the value of TOD_nsec + TOD_sec*109.

The parameter is to be used for time stamping transfer to partner devices.

NSX32/NSX44

The lower 32 or 44 bits of NSX48.

SERDES

PCS

MAC

ANA

SQS

REW

PTP

Tx FIFO

PTP

MAC

PCS

SERDES

Rx stamp (NSF)

Tx stamp (NSF)

REW stamp

(all counters)

Tx Port

Rx Port

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