VSC7440 datasheet(300/444 Pages) MICROSEMI

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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

283

ingress time is the time at which the first bit of the DMAC is received on the SERDES interface so a pre-

configured delay is used to adjust for this in the time stamp calculations. The subtraction of the delay is

done by the port modules. Delays due to barrel shifting are adjusted by a manual process, where the

barrel shifter state must be read out and used when configuring the port’s I/O delays. For more

information, see Configuring I/O Delays, page 289.

Similarly, in the egress direction, a delay is added to the time stamps in order to move the time stamping

point to when the first bit of the DMAC leaves the SerDes. This added delay takes place in the port

modules.

The analyzer recognizes the PTP frames through VCAP IS2 matching and decides which operation to

perform (one-step, two-step, or time-of-day-write) and which delays to add to the correction field (CF) to

adjust for instance for asymmetrical path delays.

The rewriter modifies the PTP frame and can instruct the egress port module to add a delay to the

correction field corresponding to the delay from the rewriting point to the transmission point. Otherwise, it

can insert the original time stamp and the egress time stamp in a time stamp FIFO, which can be read by

the CPU. The rewriter operation depends on the analyzer decisions and the PTP modes of the frame’s

ingress and egress ports.

The following table lists the PTP configuration available to the rewriter.

3.29.1

One-Step Functions

The mode of a port determines how timing information is exchanged between the port and its link partner.

Only the rewriter uses this information for executing the correct calculations and for deciding the right

delta command to be executed in the egress port module. When the analyzer has decided to do a one-

step timing update of a frame, the rewriter updates the correction field to the time at which it passes

through the rewriter, and it will afterwards either prepare the PDU with timing information for the link

partner, or it will ask the port module to add the time delay to the serial transmission onto the correction

field. The following sections describe the PTP port modes used by the rewriter when doing one-step

updates.

3.29.1.1 Front

Front ports are ports on the boundary of the local PTP system. Frames received must have their timing

information updated to the time at which they left the link partner, and frames transmitted will likewise be

updated to the time of transmission.

3.29.1.2 RSRV32

In a multichip system, the RSRV32 mode can be used for interconnect links. The ingress unit must

update the CF field with the residence time from ingress link to any point in the ingress unit, and in the

RSRV field of the PDU set the value of NSX32 at the time of CF update. As the egress unit in a multichip

system has synchronized NSX32 (common clock by some means), it will be able to update the CF field

with time passed from the ingress rewriter to the time of system departure.

Table 214 •

Rewriter PTP Configuration

Field

Description

Mode of ingress port

Mode of egress port

IDLY(2)

Two ingress delays optionally added to CF. Looked up for the ingress port. Format is 32 bits

signed.

EDLY

One egress delay optionally added to CF. Looked up for the egress port. Only one delay is

added per transfer. Format is 32 bits signed.

UDP_CSUM_DIS(4/6)

Can disable updating the UDP checksums in IPv4 and IPv6 frames.

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