VSC7440 datasheet(413/444 Pages) MICROSEMI

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Electrical Specifications

VMDS-10492 VSC7440 Datasheet Revision 4.2

396

6.2.13

Serial Inputs/Outputs

This section provides the AC characteristics for the serial I/O signals: SG0_CLK, SG0_DO, SG0_DI, and

SG0_LD. These signals are GPIO alternate functions. For more information, see GPIO Overlaid

Functions, page 352.

The serial I/O timing diagram is shown in the following illustration.

Figure 146 •

Serial I/O Timing Diagram

The following table lists the serial I/O timing specifications. Applies to the GPIO_[3:0] pins when used as

serial I/O.

6.2.14

Recovered Clock Outputs

This section provides the AC characteristics for the recovered clock output signals, RCVRD_CLK[3:0].

These signals are GPIO alternate functions. For more information about the GPIO pin mapping, see

GPIO Overlaid Functions, page 352.

The following illustration shows the test circuit for the recovered clock output signals.

Table 315 •

Serial I/O Timing Specifications

Parameter

Symbol

Minimum

Maximum

Unit

Clock frequency1

The SIO clock frequency is programmable.

ƒ25

MHz

SG0_CLK clock pulse width

tW(CLK)

SG0_DO valid after clock falling

tV(DO)

6ns

SG0_DO hold time from clock falling

tH(DO)

6ns

SG0_LD propagation delay from clock falling

tPD(LATCH) 40

SG0_LD width

tW(LATCH)

SG0_DI setup time to clock

tSU(DI)

SG0_DI hold time from clock

tH(DI)

4ns

SG[2:0]_CLK

tV(DO)

tH(DO)

tW(CLK)

tPD(LATCH)

VIH(DC)

VIL(DC)

VIH(DC)

VIL(DC)

VIH(DC)

VIL(DC)

VIH(DC)

VIL(DC)

tW(Latch)

tH(DI)

tSU(DI)

SG[2:0]_DO

SG[2:0]_LD

SG[2:0]_DI

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