VSC7511 datasheet(160/324 Pages) MICROSEMI

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Functional Descriptions

VMDS-10488 VSC7511 Datasheet Revision 4.2

145

REW_OP

117

Rewriter operation command. Used when BYPASS = 1. The

following commands are supported:

No operation: REW_OP[3:0] = 0.

No operation.

Special Rewrite: REW_OP[3:0] = 8.

Swap the MAC addresses and clear bit 40 in the new SMAC

when transmitting the frame.

DSCP remark: REW_OP[2:0] = 1.

REW_OP[8:3] contains the frame’s classified DSCP to be used

at egress for remarking.

One-step PTP: REW_OP[2:0] = 2.

The frame’s residence time is added to the correction field in the

PTP frame. The following sub-commands can be encoded:

REW_OP[5]: Set if egress delay must be added to residence

time.

Two-step PTP: REW_OP[2:0] = 3.

The frame’s departure time stamp is saved in the time stamp

FIFO queue at egress. REW_OP[8:3] contains the PTP time

stamp identifier used by the time stamp FIFO queue. Identifiers

0 through 3 are pre-allocated to be used by CPU injected

frames.

Origin PTP: REW_OP[2:0] = 5.

The time of day at the frame's departure time is written into the

origintime stamp field in the PTP frame.

Unspecified bits must be set to 0.

REW_VAL

By default, this field contains the frame’s receive time stamp. For

injected frames, this can be set by the CPU to indicate when the

injection started. The rewriter can then calculate a residence

time based on REW_VAL and the frame’s transmission time

stamp.

If TFRM_TIMER > 0, then REW_VAL contains the transmission

slot for periodic frame transmission (0 through 1023).

RESERVED

Reserved.

DEST

This is the destination set for the frame. DEST[11] is the CPU.

Used when BYPASS = 1.

RESERVED

Reserved.

SRC_PORT

The port number where the frame was injected (0-12).

RESERVED

Reserved.

TFRM_TIMER

Selects timer for periodic transmissions (1 through 8). If

TFRM_TIMER=0 then normal injection.

RESERVED

Reserved.

The frame’s drop precedence (DP) level after policing. Used

when BYPASS = 1.

Table 116 •

CPU Injection Header (continued)

Field

Bit

Width

Description

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