T1024 datasheet(41/49 Pages) FREESCALE

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CPLD_FANCSR field descriptions

Field

Description

0–3

This field is reserved.

4–7

FAN_PWM

0000

PWM duty cycle is 0%, fan stop running.

0001~1110 PWM duty cycle is 6.7%~93.3%, fan speed control.

1111

PWM duty cycle is 100%, fan full speed.

3.1.10 Panel LED Control and Status Register (CPLD_LEDCSR)

Address: 0h base + 15h offset = 15h

Bit

Read

STS_LED

Reserved

Write

Reset

CPLD_LEDCSR field descriptions

Field

Description

STS_LED

Light emitting device.

Panel LED is on

Panel LED flashes at 0.5 s

1–7

This field is reserved.

Reserved.

3.1.11 SDHC Card Status Register (CPLD_SDSR )

Address: 0h base + 16h offset = 16h

Bit

Read

Reserved

SD_VDD

Write

Reset

* Notes:

x depends Jumper setting.x = Undefined at reset.

•

CPLD_SDSR field descriptions

Field

Description

0–6

This field is reserved.

SD_VDD

SDHC card VDD voltage is 1.8V.

SDHC card VDD voltage is 3.3V.

Chapter 3 CPLD Specification

QorIQ T1024 Reference Design Board User Guide, Rev. 0, 04/2015

Freescale Semiconductor, Inc.

T1024 Datasheet(PDF) 41 Page - Freescale Semiconductor, Inc

T1024 Datasheet(HTML) 41 Page - Freescale Semiconductor, Inc

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