T1024 datasheet(8/49 Pages) FREESCALE

8 / 49 page

NOTE

Due to RCW limitations, SGMII 2.5G Ethernet port cannot

work with XFI 10GBase-T port and MAC3 RGMII

ethernet port in the same mode.

• CPLD

• Manages system power and reset sequencing

• Configures DUT, board, and clock with dynamic shmoo

• Reset and interrupt monitor and control

• General fault monitoring and logging

• Sleep mode control

• Clocks

• System and DDR clock or single differential clock

• SerDes clocks: : Clocks are provided to all SerDes blocks and slots. Supported

clock frequencies are:

• 100 MHz

• 125 MHz

• 156.25 MHz

• USB

• Supports two USB 2.0 ports with integrated PHYs

• SDHC

• SDHC port connects directly to an adapter card slot

• SPI

• On-board support of two different devices

• Other IO

• Two serial ports with RJ45 interface

• Two I2C ports

NOTE

For details on T1024 silicon features and block diagram, see

QorIQ T1024 Reference Manual

T1024RDB board features

QorIQ T1024 Reference Design Board User Guide, Rev. 0, 04/2015

Freescale Semiconductor, Inc.

T1024 Datasheet(PDF) 8 Page - Freescale Semiconductor, Inc