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LP173WD1 Datasheet(PDF) 8 Page - LG Semicon Co.,Ltd. |
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LP173WD1 Datasheet(HTML) 8 Page - LG Semicon Co.,Ltd. |
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8 / 30 page ![]() Product Specification LP173WD1 Liquid Crystal Display 3 3 1 DC S ifi ti 3-3. LVDS Signal Timing Specifications 3-3-1. DC Specification Description Symb ol Min Max Unit Notes LVDS Differential Voltage |VID| 100 600 mV - LVDS Common mode Voltage VCM 0.6 1.8 V - LVDS Input Voltage Range VIN 0.3 2.1 V - 3-3-2. AC Specification Description Symbol Min Max Unit Notes LVDS Clock to Data Skew Margin tSKEW - 400 + 400 ps 85MHz > Fclk ≥ 65MHz tSKEW - 600 + 600 ps 65MHz > Fclk ≥ 25MHz LVDS Clock to Clock Skew Margin (Even to Odd) tSKEW_EO -1/7 + 1/7 Tclk - Maximum deviation FDEV - ± 3 % - Ver. 1.0 27.May, 2009 8/ 30 of input clock frequency during SSC FDEV ± 3 % Maximum modulation frequency of input clock during SSC FMOD - 200 KHz - |
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