Product Specification

LP173WD1

Liquid Crystal Display

3-4. Signal Timing Specifications

This is the signal timing required at the input of the User connector All of the interface signal timing should be

Table 5. TIMING TABLE

This is the signal timing required at the input of the User connector. All of the interface signal timing should be

satisfied with the following specifications and specifications of LVDS Tx/Rx for its proper operation.

ITEM

Symbol

Min.

Typ.

Max.

Unit

Note

DCLK

Frequency

f

CLK

47.375

48.875

50.375

MHz

2 Port

Period

t

HP

868

892

908

Hsync

tCLK

2 Port

Width

t

WH

20

24

32

Width-Active

tw

HA

800

800

800

Vsync

Period

t

VP

907

912

926

tHP

Width

t

WV

23

5

Width-Active

tw

VA

900

900

900

Horizontal back porch

t

32

44

48

Data

Enable

Horizontal back porch

t

HBP

32

44

48

tCLK

2 Port

Horizontal front porch

t

HFP

16

24

28

Vertical back porch

t

VBP

47

15

tHP

Vertical front porch

t

VFP

12

6

3-5. Signal Timing Waveforms

Low: 0.3VCC

High: 0.7VCC

Hsync t

WH

Date Enable

Vsync

Ver. 1.0

27.May, 2009

10/ 30

Date Enable