TPS746 datasheet(17/45 Pages) TI

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TPS746-Q1

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SBVS358A – JUNE 2018 – REVISED OCTOBER 2019

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7.3 Feature Description

7.3.1 Undervoltage Lockout (UVLO)

The TPS746-Q1 uses an undervoltage lockout (UVLO) circuit that disables the output until the input voltage is

greater than the rising UVLO voltage (VUVLO). This circuit ensures that the device does not exhibit any

unpredictable behavior when the supply voltage is lower than the operational range of the internal circuitry. When

VIN is less than VUVLO, the output is connected to ground with a pulldown resistor (RPULLDOWN).

7.3.2 Shutdown

The enable pin (EN) is active high. Enable the device by forcing the EN pin to exceed VEN(HI). Turn off the device

by forcing the EN pin to drop below VEN(LO). If shutdown capability is not required, connect EN to IN.

The TPS746-Q1 has an internal pulldown MOSFET that connects an RPULLDOWN resistor to ground when the

device is disabled. The discharge time after disabling depends on the output capacitance (COUT) and the load

resistance (RL) in parallel with the pulldown resistor (RPULLDOWN). Equation 1 calculates the time constant:

τ = ( RPULLDOWN × RL) / (RPULLDOWN + RL)

(1)

7.3.3 Foldback Current Limit

The device has an internal current limit circuit that protects the regulator during transient high-load current faults

or shorting events. The current limit is a hybrid brickwall-foldback scheme. The current limit transitions from a

brickwall scheme to a foldback scheme at the foldback voltage (VFOLDBACK). In a high-load current fault with the

output voltage above VFOLDBACK, the brickwall scheme limits the output current to the current limit (ICL). When the

voltage drops below VFOLDBACK, a foldback current limit activates that scales back the current as the output

voltage approaches GND. When the output is shorted, the device supplies a typical current called the short-

circuit current limit (ISC). ICL and ISC are listed in the Electrical Characteristics table.

For this device, VFOLDBACK = 0.4 V × VOUT(NOM).

The output voltage is not regulated when the device is in current limit. When a current limit event occurs, the

device begins to heat up because of the increase in power dissipation. When the device is in brickwall current

limit, the pass transistor dissipates power [(VIN – VOUT) × ICL]. When the device output is shorted and the output

is below VFOLDBACK, the pass transistor dissipates power [(VIN – VOUT) × ISC]. If thermal shutdown is triggered, the

device turns off. After the device cools down, the internal thermal shutdown circuit turns the device back on. If

the output current fault condition continues, the device cycles between current limit and thermal shutdown. For

more information on current limits, see the Know Your Limits application report.

TPS746 Datasheet(PDF) 17 Page - Texas Instruments