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TPS746 Datasheet(PDF) 20 Page - Texas Instruments

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Part # TPS746
Description  TPS746-Q1 1-A LDO With Power-Good in Small Wettable Flank WSON Packages
PDF  45 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS746 Datasheet(HTML) 20 Page - Texas Instruments

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TPS746-Q1
EN
IN
OUT
VIN
VOUT
CIN
COUT
RPG*
PG
*Pull-up resistor not required
for push-pull option
FB
GND
R1
R2
Cff
20
TPS746-Q1
SBVS358A – JUNE 2018 – REVISED OCTOBER 2019
www.ti.com
Product Folder Links: TPS746-Q1
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Adjustable Device Feedback Resistors
Figure 50 shows that the output voltage of the TPS746P-Q1 can be adjusted from 0.55 V to 5.5 V by using a
resistor divider network.
Figure 50. Adjustable Operation
The adjustable-version device requires external feedback divider resistors to set the output voltage. VOUT is set
using the feedback divider resistors, R1 and R2, according to the following equation:
VOUT = VFB × (1 + R1 / R2)
(2)
To ignore the FB pin current error term in the VOUT equation, set the feedback divider current to 100x the FB pin
current listed in the Electrical Characteristics table. This setting provides the maximum feedback divider series
resistance, as shown in the following equation:
R1 + R2 ≤ VOUT / (IFB × 100)
(3)
8.1.2 Input and Output Capacitor Selection
The TPS746-Q1 requires an output capacitance of 0.47 µF or larger for stability. Use X5R- and X7R-type
ceramic capacitors because these capacitors have minimal variation in value and equivalent series resistance
(ESR) over temperature. When choosing a capacitor for a specific application, pay attention to the dc bias
characteristics for the capacitor. Higher output voltages cause a significant derating of the capacitor. For best
performance, the maximum recommended output capacitance is 220 µF.
Although an input capacitor is not required for stability, good analog design practice is to connect a capacitor
from IN to GND. Some input supplies have a high impedance, thus placing the input capacitor on the input
supply helps reduce the input impedance. This capacitor counteracts reactive input sources and improves
transient response, input ripple, and PSRR. If the input supply has a high impedance over a large range of
frequencies, several input capacitors can be used in parallel to lower the impedance over frequency. Use a
higher-value capacitor if large, fast, rise-time load transients are anticipated, or if the device is located several
inches from the input power source.
8.1.3 Dropout Voltage
The TPS746-Q1 uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the
dropout voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output
resistance is the RDS(ON) of the PMOS pass element. VDO scales approximately with output current because the
PMOS device behaves like a resistor in dropout mode. As with any linear regulator, PSRR and transient
response degrade as (VIN – VOUT) approaches dropout operation.



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