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TPS746 Datasheet(PDF) 29 Page - Texas Instruments |
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TPS746 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 45 page ![]() 1 2 4 8 7 5 GND PLANE R1 Cff COUT CIN R2 RPG * Signal via to Pin1 *Pull-up resistor not required for push-pull option 6 3 1 2 3 6 5 4 GND PLANE R1 Cff COUT CIN R2 RPG * Signal via to Pin1 *Pull-up resistor not required for push-pull option 29 TPS746-Q1 www.ti.com SBVS358A – JUNE 2018 – REVISED OCTOBER 2019 Product Folder Links: TPS746-Q1 Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated 9 Power Supply Recommendations The TPS745-Q1 is designed to operate from an input voltage supply range from 1.5 V to 6.0 V. The input voltage range provides adequate headroom in order for the device to have a regulated output. This input supply must be well regulated. If the input supply is noisy, additional input capacitors with low ESR may help improve output noise performance. Connect a low output impedance power supply directly to the IN pin of the TPS746-Q1. 10 Layout 10.1 Layout Guidelines • Place input and output capacitors as close to the device as possible. • Use copper planes for device connections in order to optimize thermal performance. • Place thermal vias around the device to distribute heat. • Place a tented thermal via directly beneath the thermal pad of the DRV or DRB package. An untented via can wick solder or solder paste away from the thermal pad joint during the soldering process, leading to a compromised solder joint on the thermal pad. 10.2 Layout Examples Figure 60. Layout Example for the DRV Package Figure 61. Layout Example for the DRB package |
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