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LTC3370 Datasheet(PDF) 9 Page - Analog Devices

Part # LTC3370
Description  Dual 5V, 2A Synchronous Step-Down DC/DCs in 2mm 횞 2mm LQFN
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC3370 Datasheet(HTML) 9 Page - Analog Devices

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LTC3315A
9
Rev. A
For more information www.analog.com
PIN FUNCTIONS
EN1 (Pin 1): Enable Input for Buck Regulator 1. Active
high. The EN1 pin has a precision threshold and an
optional external resistor divider from VIN or another
supply programs when Buck Regulator 1 is enabled. If
the precision threshold is not required, drive EN1 to VIN
to enable. Do not float.
FB1 (Pin 2): Feedback Input for Buck Regulator 1.
Program the output voltage and close the control loop
by connecting this pin to the middle node of a resistor
divider between the output and ground. The LTC3315A
regulates FB1 to 500mV (typical). A phase lead capaci-
tor connected between VOUT1 and FB1 may be used to
optimize transient response.
FB2 (Pin 3): Feedback Input for Buck Regulator 2.
Program the output voltage and close the control loop
by connecting this pin to the middle node of a resistor
divider between the output and ground. The LTC3315A
regulates FB2 to 500mV (typical). A phase lead capaci-
tor connected between VOUT2 and FB2 may be used to
optimize transient response.
EN2 (Pin 4): Enable Input for Buck Regulator 2. Active
high. The EN2 pin has a precision threshold and an
optional external resistor divider from VIN or another
supply programs when Buck Regulator 2 is enabled. If
the precision threshold is not required, drive EN2 to VIN
to enable. Do not float.
PGOOD (Pin 5): Power Good Output. Open drain out-
put. When the regulated output voltage of either enabled
switching regulator falls below its PGOOD threshold or
rises above its overvoltage threshold, this pin is driven
low. When both buck regulators are disabled PGOOD is
driven low.
SW2 (Pin 6): Switch Node for Buck Regulator 2. Connect
an inductor to this pin with a short, wide trace.
VIN (Pin 7, Pin 10): Input Supply Pins. The VIN pins sup-
ply current to internal circuitry and to each buck’s PMOS
power switch. Connect both VIN pins together with a short,
wide trace and bypass to GND with low ESR capacitors
located as close as possible to the pins.
GND (Pin 8, Pin 9, Exposed Pad Pin 13): Ground.
Connect the exposed pad to a continuous ground plane
on the printed circuit board directly under the LTC3315A
for electrical contact and rated thermal performance.
Additionally, Pin 8 and Pin 9 should be shorted to the
exposed pad with a wide trace.
SW1 (Pin 11): Switch Node for Buck Regulator 1. Connect
an inductor to this pin with a short, wide trace.
MODE/SYNC (Pin 12): Mode Selection and External Clock
Synchronization Input. Ground this pin to enable pulse-
skipping mode. For higher efficiency at light loads, tie
this pin to VIN to enable Burst Mode. For fast transient
response and constant frequency operation over a wide
load range, float this pin to enable forced continuous
mode. Drive MODE/SYNC with an external clock to syn-
chronize both buck converters to the applied frequency.
When syncing, the operating mode is forced continuous.
The slope compensation is automatically adapted to the
external clock frequency. In the absence of an external
clock both buck converters will switch at the default
switching frequency.



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