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LTC4232 Datasheet(PDF) 7 Page - Analog Devices |
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LTC4232 Datasheet(HTML) 7 Page - Analog Devices |
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7 / 22 page ![]() LTC4231 7 Rev. B For more information www.analog.com PIN FUNCTIONS GATE: Gate Drive for External N-Channel MOSFET. After all start-up conditions are satisfied, a 10μA pull-up cur- rent from the internal charge pump charges up ∆VGATE to the high threshold voltage ∆VGATE(H) and then turns off. The charge pump turns on again when ∆VGATE decays by more than 0.7V or every 15ms, whichever comes first, and recharges ∆VGATE to ∆VGATE(H). During GATE turn- off, a 1mA pull-down current discharges GATE to GND. During severe short circuits, a 130mA pull-down current is activated to discharge GATE to SOURCE. GND: Device Ground. GNDSW: Switched GND. Connect this pin to an external resistive network to monitor IN for overvoltage or under- voltage (OV/UV). To reduce the power dissipated by this resistive divider, the LTC4231 periodically samples IN by connecting GNDSW to GND once every 10ms. Tie this pin to GND if unused. IN: Supply Voltage and Current Sense Input. This pin has a nominal undervoltage lockout threshold of 2.3V. SHDN: Shutdown Control Input. A logic high at SHDN enables the LTC4231. GATE ramps up after a debounce delay of 40ms. A logic low at SHDN activates a 1mA pull- down current at GATE, discharging it to GND. Once GATE < 1.2V, the LTC4231 enters a low current Shutdown. Connect to IN if unused. When connected to IN, if IN goes below ground, use a resistor to limit the current to ≤1mA. OV: Overvoltage Comparator Input. Connect this pin to an external resistive network to monitor IN for OV. This pin connects internally to an overvoltage comparator with a 0.795V threshold. To reduce the power dissipated by this resistive divider, the LTC4231 periodically samples IN by connecting GNDSW to GND once every 10ms. Once an OV is detected at IN, GATE and STATUS pull low. Tie this pin to GND if unused. SENSE: Current Sense Input. Connect to the output of the current sense resistor. The circuit breaker comparator and the analog current limit amplifier monitor the voltage across the current sense resistor. During an overcurrent fault when ∆VSENSE exceeds 50mV, the circuit breaker comparator trips and triggers TIMER to ramp up. For more severe overcurrent faults, the analog current limit amplifier controls the gate of the external MOSFET to keep ∆VSENSE at 80mV. To disable the circuit breaker compara- tor and analog current limit amplifier, connect this pin to IN. SOURCE: N-Channel MOSFET Source Connection. Connect this pin to the source of the external MOSFET. STATUS: Status Output. Open-drain output that goes high impedance when ∆VGATE first exceeds ∆VGATE(H). The state of the pin is latched and resets (pulls low) when SHDN goes low, an UVLO occurs, an OV/UV is detected at IN or an overcurrent fault sets the internal current fault latch. This pin may be left open if unused. TIMER: Timer Input. Connect a capacitor between this pin and GND to set a 24ms/µF duration for overcurrent before the internal current fault latch trips and turns off the MOSFET. For the LTC4231-1 latchoff option, the MOSFET remains off until the current fault latch is cleared by pull- ing SHDN low or by cycling power. For the LTC4231-2 auto-retry option, the current fault latch is cleared auto- matically and the GATE is ramped up after a 500ms delay. UVH, UVL: Undervoltage Comparator Input. Connect these pins to an external resistive network to monitor IN for UV. These pins connect internally to an undervolt- age comparator with a 0.795V threshold. The comparator monitors UVH when GATE is low and UVL when GATE is high to implement separate undervoltage turn-on and undervoltage turn-off thresholds. To reduce the power dissipated by this resistive divider, the LTC4231 periodi- cally samples IN by connecting GNDSW to GND once every 10ms. Once an UV is detected at these pins, GATE and STATUS pull low. Tie both pins to IN if unused. When connected to IN, for applications where IN goes below ground, use a resistor to limit the current to ≤1mA. Exposed Pad (QFN Package): The exposed pad may be left open or connected to device ground. |
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