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LTC4232 Datasheet(PDF) 9 Page - Analog Devices

Part # LTC4232
Description  Micropower Hot Swap Controller
PDF  22 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC4232 Datasheet(HTML) 9 Page - Analog Devices

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LTC4231
9
Rev. B
For more information www.analog.com
OPERATION
The LTC4231 is a micropower Hot Swap controller that
controls an external N-channel MOSFET to turn on and
off a supply voltage in a controlled manner. This allows a
circuit to be safely inserted and removed from a powered
connector without glitches or connector damage from
uncontrolled inrush current.
When the LTC4231 is first powered up, the gate of the
MOSFET is held at GND to keep it off. Pulling SHDN
high and IN above undervoltage lockout (UVLO) starts
an internal clock that monitors the resistive divider at IN
once every 10ms by connecting GNDSW to GND. A 40ms
debounce cycle is also started. Average ICC during this
debounce mode is 4µA.
After the 40ms debounce cycle, the LTC4231 goes into
start-up mode to ramp up GATE. In this mode, all circuits
blocks except the overvoltage or undervoltage (OV/UV)
block are activated and ICC = 300µA. The internal charge
pump supplies a 10µA pull-up current to GATE. Once
∆VGATE exceeds ∆VGATE(H), STATUS goes high impedance.
This indicates that GATE is high and the power path is on.
Average ICC drops to 4µA during this normal on mode as
some circuit blocks are shut down and the internal charge
pump periodically turns on to recharge GATE as needed.
The periodic monitoring of the IN resistive divider contin-
ues as long as SHDN is high and IN ≥ 2.3V.
If an OV/UV violation is detected during the IN monitor-
ing time, the part goes into voltage fault mode (average
ICC = 4µA) where GATE and STATUS is pulled to GND.
The debounce cycle restarts when no OV/UV violation
is detected during a subsequent IN monitoring window.
The LTC4231 has a circuit breaker comparator that moni-
tors the voltage across the current sense resistor. This
comparator trips when ∆VSENSE exceeds 50mV, bring-
ing the LTC4231 into overcurrent mode. In this mode, all
circuits blocks except the OV/UV block are activated and
ICC = 300µA. If ∆VSENSE > 80mV, the analog current limit
amplifier limits ∆VSENSE to 80mV by servoing ∆VGATE in
an active control loop. The TIMER capacitor is ramped up
with a 50µA pull-up when ∆VSENSE > 50mV. When TIMER
> 1.193V, the current fault latch is set, causing GATE and
STATUS to pull low. The part goes into current fault mode.
In current fault mode, the latchoff (LTC4231-1) version
keeps TIMER and GATE low. The auto-retry (LTC4231-2)
version waits 500ms before GATE is ramped up again.
For both versions, the part can be reset by cycling SHDN
low then high or by cycling IN to GND and back. After the
reset, the LTC4231 goes through a debounce cycle before
re-starting GATE.
SHDN acts as a shutdown switch for the supply path.
When it goes high, the LTC4231 ramps GATE up after a
debounce cycle to turn on the external MOSFET. When it
goes low, GATE is pulled to GND to turn off the external
MOSFET. The LTC4231 then goes into shutdown mode
where ICC drops to 0.3µA.
IN, SENSE, GATE and SOURCE are protected against
reverse inputs of up to –40V. Two reverse voltage com-
parators detect negative input potentials at SENSE or
GATE and quickly connect GATE to SENSE. When used
with back-to-back MOSFETs as shown in Figure 5, this
feature will isolate the load from a negative input.



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