ATS17501 datasheet(6/23 Pages) ALLEGRO

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Dual Output Differential Speed and Direction Sensor IC

ATS17501

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

OPERATING CHARACTERISTICS (continued): Valid throughout operating ranges, unless otherwise specified

Characteristic

Symbol

Test Conditions

Min.

Typ. [7]

Max.

Unit

OUTPUT CHARACTERISTICS (continued) [8]

Fault Voltage [9]

VFAULT

Fault Detection

Mode enabled;

5 V, 1 kΩ or

5 V, 3 kΩ option

High fault (VFAULT(HIGH))

4.5

–

Mid fault (VFAULT(MID))

1.25

–

3.75

Low fault (VFAULT(LOW))

–

0.5

Fault Detection

Mode enabled;

12 V, 1 kΩ option

High fault (VFAULT(HIGH))

10.8

–

Mid fault (VFAULT(MID))

3.6

–

8.4

Low fault (VFAULT(LOW))

–

1.2

Allowable Pullup Voltage

VPULLUP

Fault Detection Mode disabled

–

Fault Detection

Mode enabled

5 V, 1 kΩ or 5 V, 3 kΩ option

4.75

–

5.25

12 V, 1 kΩ option

11.4

–

12.6

Allowable Pullup Resistor [10]

RPULLUP

Fault Detection Mode disabled

–

kΩ

Fault Detection

Mode enabled

5 V, 1 kΩ option

0.8

–

1.46

kΩ

5 V, 3 kΩ option

1.46

–

3.4

kΩ

12 V, 1 kΩ option

0.9

–

1.1

kΩ

Allowable Load Capacitor [11]

CLOAD

Fault Detection Mode enabled

–

Output Leakage Current

IOUT(OFF) Fault Detection Mode disabled; VOUT = VOUT(HIGH)

–

µA

Duty Cycle

Speed output protocol; Dynamic Threshold

option; sinusoidal input signal; fOP < 1 kHz

Output Rise Time

10%→90%; VPULLUP = 5 V; RPULLUP = 1 kΩ;

CLOAD = 2.2 nF

–

µs

Output Fall Time

90%→10%;

VPULLUP = 5 V;

RPULLUP = 1 kΩ;

CLOAD = 2.2 nF

Fault Detection Mode disabled;

Fast fall time option

–

0.5

–

µs

Fault Detection Mode disabled;

Slow fall time option

–

3.5

–

µs

Fault Detection Mode

enabled

–

µs

Forward Pulse Width [12]

tw(FWD)

µs

Reverse Pulse Width [12]

tw(REV)

104

µs

Propagation Delay

Delay from the magnetic signal crossing a switch

point threshold to the start of the output transition

–

µs

Jitter [13]

–

σ×6; sinusoidal

input signal;

fOP = 1 kHz

BDIFF(pk-pk) = 100 G

–

0.13

target degrees

BDIFF(pk-pk) = 150 G

–

0.086

target degrees

BDIFF(pk-pk) = 200 G

–

0.064

target degrees

[7]

Typical values are for VCC = 5 V and TA = 25°C, unless otherwise specified.

[8]

Output characteristics are valid for each output independently, unless otherwise specified.

[9]

Valid with Fault Detection Mode enabled and correct programming of the Fault Detection Load Circuit option; see Selection Guide.

[10]

See Application Circuit section.

[11]

Minimum capacitor required when Fault Detection Mode is enabled to ensure correct output levels over operating conditions. Increased load capacitance will directly impact maximum operating

frequency due to the increased rise and fall times; see Application Circuit section.

[12]

Time from start of output transition from VOUT(HIGH) to VOUT(LOW) to start of output transition from VOUT(LOW) to VOUT(HIGH). Measured pulse width will vary with load circuit configurations and measure-

ment thresholds. Valid with Pulse or Pulse Inverted output protocol; see Programming Options section.

[13]

Guaranteed by design and characterization only. Characterization performed by measuring greater than 1,000 falling output edges of the same target feature at constant temperature using Reference

Target 60-0, see Reference Target Characteristics section. Value representative of a 6-σ distribution, such that 99.76% of the measured values are within the specified target degree.

Continued on next page...

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March 19, 2020

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